NRF52820-QDAA-R datasheet(128/437 Pages) NORDIC

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Peripherals

• Analog input (for selected pins)

The PIN_CNF registers are retained registers. See POWER — Power supply on page 49 for more

information about retained registers.

6.8.1 Pin configuration

Pins can be individually configured through the SENSE field in the PIN_CNF[n] register to detect either a

high or low level input.

When the correct level is detected on a configured pin, the sense mechanism will set the DETECT signal

high. Each pin has a separate DETECT signal. Default behavior, defined by the DETECTMODE register,

combines all DETECT signals from the pins in the GPIO port into one common DETECT signal and routes it

through the system to be utilized by other peripherals. This mechanism is functional in both System ON

and System OFF mode. See GPIO port and the GPIO pin details on page 128.

The following figure illustrates the GPIO port containing 32 individual pins, where

PIN0 is shown in more

detail for reference. All signals on the left side of the illustration are used by other peripherals in the

system and therefore not directly available to the CPU.

GPIO port

PIN31

PIN0

PIN31

PIN[31].CNF

PIN[31].IN

PIN[31].OUT

PIN0

PIN[0].CNF

PIN[0].IN

PIN[0].OUT

PIN0

PIN[0].OUT

PIN[0].IN

Sense

OUT_OVERRIDE

DIR_OVERRIDE

PIN0.DETECT

OUT

O: output buffer

I: input buffer

PIN[0].CNF.INPUT

PIN[0].CNF.PULL

PIN[0].CNF.DRIVE

PIN[0].CNF.SENSE

PIN[0].CNF.DIR

INPUT_OVERRIDE

ANAIN

ANAEN

PIN1.DETECT

PIN31.DETECT

LATCH

LDETECT

DETECT

DETECTMODE

Figure 42: GPIO port and the GPIO pin details

Pins should be in a level that cannot trigger the sense mechanism before being enabled. If the SENSE

condition configured in the PIN_CNF registers is met when the sense mechanism is enabled, the DETECT

signal will immediately go high. A PORT event is triggered if the DETECT signal was low before enabling the

sense mechanism. See GPIOTE — GPIO tasks and events on page 135.

See the following peripherals for more information about how the DETECT signal is used:

• POWER — Power supply on page 49 - uses the DETECT signal to exit from System OFF mode.

• GPIOTE — GPIO tasks and events on page 135 - uses the DETECT signal to generate the PORT event.

When a pin's PINx.DETECT signal goes high, a flag is set in the LATCH register. For example, when the

PIN0.DETECT signal goes high, bit 0 in the LATCH register is set to

1. If the CPU performs a clear operation

on a bit in the LATCH register when the associated PINx.DETECT signal is high, the bit in the LATCH register

will not be cleared. The LATCH register will only be cleared if the CPU explicitly clears it by writing a

1 to

the bit that shall be cleared, i.e. the LATCH register will not be affected by a PINx.DETECT signal being set

low.

The LDETECT signal will be set high when one or more bits in the LATCH register are

1. The LDETECT signal

will be set low when all bits in the LATCH register are successfully cleared to

If one or more bits in the LATCH register are

1 after the CPU has performed a clear operation on the LATCH

on page 129.

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NRF52820-QDAA-R Datasheet(PDF) 128 Page - Nordic Semiconductor

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