NRF52820-QDAA-R datasheet(135/437 Pages) NORDIC

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Peripherals

Symbol

Description

Min.

Typ.

Max.

Units

tRF,15pF

Rise/fall time, standard drive mode, 10-90%, 15 pF load12

tRF,25pF

Rise/fall time, standard drive mode, 10-90%, 25 pF load12

tRF,50pF

Rise/fall time, standard drive mode, 10-90%, 50 pF load12

tHRF,15pF

Rise/Fall time, high drive mode, 10-90%, 15 pF load12

tHRF,25pF

Rise/Fall time, high drive mode, 10-90%, 25 pF load12

tHRF,50pF

Rise/Fall time, high drive mode, 10-90%, 50 pF load12

RPU

Pull-up resistance

kΩ

RPD

Pull-down resistance

kΩ

CPAD

Pad capacitance

6.9 GPIOTE — GPIO tasks and events

The GPIO tasks and events (GPIOTE) module provides functionality for accessing GPIO pins using tasks and

events. Each GPIOTE channel can be assigned to one pin.

A GPIOTE block enables GPIOs to generate events on pin state change which can be used to carry out tasks

through the PPI system. A GPIO can also be driven to change state on system events using the PPI system.

Tasks and events are briefly introduced in Peripheral interface on page 85, and GPIO is described in

more detail in GPIO — General purpose input/output on page 127.

Low power detection of pin state changes is possible when in System ON or System OFF.

Instance

Number of GPIOTE channels

GPIOTE

Table 41: GPIOTE properties

Up to three tasks can be used in each GPIOTE channel for performing write operations to a pin. Two tasks

are fixed (SET and CLR), and one (OUT) is configurable to perform following operations:

• Set

• Clear

• Toggle

An event can be generated in each GPIOTE channel from one of the following input conditions:

• Rising edge

• Falling edge

• Any change

6.9.1 Pin events and tasks

The GPIOTE module has a number of tasks and events that can be configured to operate on individual

GPIO pins.

The tasks SET[n], CLR[n], and OUT[n] can write to individual pins, and events IN[n] can be generated from

input changes of individual pins.

The SET task will set the pin selected in GPIOTE.CONFIG[n].PSEL to high. The CLR task will set the pin low.

The effect of the OUT task on the pin is configurable in CONFIG[n].POLARITY. It can set the pin high, set it

low, or toggle it.

12 Rise and fall times based on simulations

4463_156 v1.0

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NRF52820-QDAA-R Datasheet(PDF) 135 Page - Nordic Semiconductor

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