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NRF52820-QDAA-R Datasheet(PDF) 138 Page - Nordic Semiconductor |
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NRF52820-QDAA-R Datasheet(HTML) 138 Page - Nordic Semiconductor |
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138 / 437 page  Peripherals Register Offset Description EVENTS_IN[6] 0x118 Event generated from pin specified in CONFIG[6].PSEL EVENTS_IN[7] 0x11C Event generated from pin specified in CONFIG[7].PSEL EVENTS_PORT 0x17C Event generated from multiple input GPIO pins with SENSE mechanism enabled INTENSET 0x304 Enable interrupt INTENCLR 0x308 Disable interrupt CONFIG[0] 0x510 Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event CONFIG[1] 0x514 Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event CONFIG[2] 0x518 Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event CONFIG[3] 0x51C Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event CONFIG[4] 0x520 Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event CONFIG[5] 0x524 Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event CONFIG[6] 0x528 Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event CONFIG[7] 0x52C Configuration for OUT[n], SET[n], and CLR[n] tasks and IN[n] event Table 44: Register overview 6.9.4.1 TASKS_OUT[n] (n=0..7) Address offset: 0x000 + (n × 0x4) Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY. Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID Access Field Value ID Value Description A W TASKS_OUT Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is configured in CONFIG[n].POLARITY. Trigger 1 Trigger task 6.9.4.2 TASKS_SET[n] (n=0..7) Address offset: 0x030 + (n × 0x4) Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high. Bit number 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0 ID A Reset 0x00000000 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 ID Access Field Value ID Value Description A W TASKS_SET Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it high. Trigger 1 Trigger task 6.9.4.3 TASKS_CLR[n] (n=0..7) Address offset: 0x060 + (n × 0x4) Task for writing to pin specified in CONFIG[n].PSEL. Action on pin is to set it low. 4463_156 v1.0 138 |
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