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NRF52820-QDAA-R Datasheet(PDF) 146 Page - Nordic Semiconductor

Part # NRF52820-QDAA-R
Description  nRF52820
PDF  437 Pages
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Manufacturer  NORDIC [Nordic Semiconductor]
Direct Link  https://www.nordicsemi.com/
Logo NORDIC - Nordic Semiconductor

NRF52820-QDAA-R Datasheet(HTML) 146 Page - Nordic Semiconductor

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Peripherals
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID
f e d c b a Z Y X W V U T S R Q P O N M L K J I H G F E D C B A
Reset 0x00000000
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID
Access
Field
Value ID
Value
Description
A-T RW CH[i] (i=0..19)
Enable or disable channel i
Disabled
0
Disable channel
Enabled
1
Enable channel
U-f
RW CH[i] (i=20..31)
Enable or disable channel i
Disabled
0
Disable channel
Enabled
1
Enable channel
6.10.2.4 CHENSET
Address offset: 0x504
Channel enable set register
Read: reads value of CH{i} field in CHEN register.
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID
f e d c b a Z Y X W V U T S R Q P O N M L K J I H G F E D C B A
Reset 0x00000000
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID
Access
Field
Value ID
Value
Description
A-T RW CH[i] (i=0..19)
Channel i enable set register. Writing '0' has no effect.
Disabled
0
Read: channel disabled
Enabled
1
Read: channel enabled
Set
1
Write: Enable channel
U-f
RW CH[i] (i=20..31)
Channel i enable set register. Writing '0' has no effect.
Disabled
0
Read: channel disabled
Enabled
1
Read: channel enabled
Set
1
Write: Enable channel
6.10.2.5 CHENCLR
Address offset: 0x508
Channel enable clear register
Read: reads value of CH{i} field in CHEN register.
Bit number
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
ID
f e d c b a Z Y X W V U T S R Q P O N M L K J I H G F E D C B A
Reset 0x00000000
0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0
ID
Access
Field
Value ID
Value
Description
A-T RW CH[i] (i=0..19)
Channel i enable clear register. Writing '0' has no effect.
Disabled
0
Read: channel disabled
Enabled
1
Read: channel enabled
Clear
1
Write: disable channel
U-f
RW CH[i] (i=20..31)
Channel i enable clear register. Writing '0' has no effect.
Disabled
0
Read: channel disabled
Enabled
1
Read: channel enabled
Clear
1
Write: disable channel
6.10.2.6 CH[n].EEP (n=0..19)
Address offset: 0x510 + (n × 0x8)
4463_156 v1.0
146



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