NRF52820-QDAA-R datasheet(145/437 Pages) NORDIC

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Peripherals

Offset

Description

FORK[21].TEP

0x964

Channel 21 task endpoint

FORK[22].TEP

0x968

Channel 22 task endpoint

FORK[23].TEP

0x96C

Channel 23 task endpoint

FORK[24].TEP

0x970

Channel 24 task endpoint

FORK[25].TEP

0x974

Channel 25 task endpoint

FORK[26].TEP

0x978

Channel 26 task endpoint

FORK[27].TEP

0x97C

Channel 27 task endpoint

FORK[28].TEP

0x980

Channel 28 task endpoint

FORK[29].TEP

0x984

Channel 29 task endpoint

FORK[30].TEP

0x988

Channel 30 task endpoint

FORK[31].TEP

0x98C

Channel 31 task endpoint

Table 48: Register overview

6.10.2.1 TASKS_CHG[n].EN (n=0..5)

Address offset: 0x000 + (n × 0x8)

Enable channel group n

Bit number

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reset 0x00000000

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Access

Field

Value ID

Value

Description

W EN

Enable channel group n

Trigger

Trigger task

6.10.2.2 TASKS_CHG[n].DIS (n=0..5)

Address offset: 0x004 + (n × 0x8)

Disable channel group n

Bit number

31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0

Reset 0x00000000

0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0

Access

Field

Value ID

Value

Description

W DIS

Disable channel group n

Trigger

Trigger task

6.10.2.3 CHEN

Address offset: 0x500

Channel enable register

4463_156 v1.0

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