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NRF52820-QDAA-R Datasheet(PDF) 325 Page - Nordic Semiconductor |
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NRF52820-QDAA-R Datasheet(HTML) 325 Page - Nordic Semiconductor |
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325 / 437 page  Peripherals Symbol Type Description ENABLE Register The TWI slave has been enabled via the ENABLE register. PREPARETX Task The TASKS_PREPARETX task has been triggered. STOP Task The TASKS_STOP task has been triggered. PREPARERX Task The TASKS_PREPARERX task has been triggered. STOPPED Event The EVENTS_STOPPED event was generated. RXSTARTED Event The EVENTS_RXSTARTED event was generated. TXSTARTED Event The EVENTS_TXSTARTED event was generated. TX prepared Internal Internal flag indicating that a TASKS_PREPARETX task has been triggered. This flag is not visible to the user. RX prepared Internal Internal flag indicating that a TASKS_PREPARERX task has been triggered. This flag is not visible to the user. Unprepare TX Internal Clears the internal 'TX prepared' flag until next TASKS_PREPARETX task. Unprepare RX Internal Clears the internal 'RX prepared' flag until next TASKS_PREPARERX task. Stop condition TWI protocol A TWI stop condition was detected. Restart condition TWI protocol A TWI restart condition was detected. Table 97: TWI slave state machine symbols The TWI slave can perform clock stretching, with the premise that the master is able to support it. The TWI slave operates in a low power mode while waiting for a TWI master to initiate a transfer. As long as the TWI slave is not addressed, it will remain in this low power mode. To secure correct behavior of the TWI slave, PSEL.SCL, PSEL.SDA, CONFIG, and the ADDRESS[n] registers must be configured prior to enabling the TWI slave through the ENABLE register. Similarly, changing these settings must be performed while the TWI slave is disabled. Failing to do so may result in unpredictable behavior. 6.23.1 EasyDMA The TWIS implements EasyDMA for accessing RAM without CPU involvement. The following table shows the Easy DMA channels that the TWIS peripheral implements. Channel Type Register Cluster TXD READER TXD RXD WRITER RXD Table 98: TWIS EasyDMA Channels For detailed information regarding the use of EasyDMA, see EasyDMA on page 37. The STOPPED event indicates that EasyDMA has finished accessing the buffer in RAM. 6.23.2 TWI slave responding to a read command Before the TWI slave can respond to a read command, the TWI slave must be configured correctly and enabled via the ENABLE register. When enabled, the TWI slave will be in its IDLE state. . A read command is started when the TWI master generates a start condition on the TWI bus, followed by clocking out the address and the READ/WRITE bit set to 1 (WRITE=0, READ=1). The READ/WRITE bit is followed by an ACK/NACK bit (ACK=0 or NACK=1) response from the TWI slave. The TWI slave is able to listen for up to two addresses at the same time. This is configured in the ADDRESS registers and the CONFIG register. 4463_156 v1.0 325 |
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