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NRF52820-QDAA-R Datasheet(PDF) 340 Page - Nordic Semiconductor |
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NRF52820-QDAA-R Datasheet(HTML) 340 Page - Nordic Semiconductor |
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340 / 437 page ![]() Peripherals Figure 127: TWIS timing diagram, 1 byte transaction 6.24 UART — Universal asynchronous receiver/ transmitter RXDRDY TXD (signal) RXD-3 TXD PSEL.CTS PSEL.TXD TXDRDY PSEL.RTS PSEL.RXD RXD (signal) RXD-2 RXD-1 RXD RXD-4 RXD-5 STARTRX STOPRX RXTO STARTTX STOPTX Figure 128: UART configuration 6.24.1 Functional description Listed here are the main features of UART. The UART implements support for the following features: • Full-duplex operation • Automatic flow control • Parity checking and generation for the 9th data bit As illustrated in UART configuration on page 340, the UART uses the TXD and RXD registers directly to transmit and receive data. The UART uses one stop bit. Note: The external crystal oscillator must be enabled to obtain sufficient clock accuracy for stable communication. See CLOCK — Clock control on page 69 for more information. 6.24.2 Pin configuration The different signals RXD, CTS (Clear To Send, active low), RTS (Request To Send, active low), and TXD associated with the UART are mapped to physical pins according to the configuration specified in the PSEL.RXD, PSEL.CTS, PSEL.RTS, and PSEL.TXD registers respectively. If the CONNECT field of a PSEL.xxx register is set to Disconnected, the associated UART signal will not be connected to any physical pin. The PSEL.RXD, PSEL.CTS, PSEL.RTS, and PSEL.TXD registers and their configurations are only used as long as the UART is enabled, and retained only for the duration the device is in ON mode. PSEL.RXD, PSEL.CTS, PSEL.RTS, and PSEL.TXD must only be configured when the UART is disabled. 4463_156 v1.0 340 |
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