NRF52820-QDAA-R datasheet(341/437 Pages) NORDIC

341 / 437 page

Peripherals

To secure correct signal levels on the pins by the UART when the system is in OFF mode, the pins must be

configured in the GPIO peripheral as described in Pin configuration on page 340.

Only one peripheral can be assigned to drive a particular GPIO pin at a time. Failing to do so may result in

unpredictable behavior.

UART pin

Direction

Output value

RXD

Input

Not applicable

CTS

Input

Not applicable

RTS

Output

TXD

Output

Table 102: GPIO configuration

6.24.3 Shared resources

The UART shares registers and resources with other peripherals that have the same ID as the UART.

All peripherals with the same ID as the UART must be disabled before configuring and using the UART.

Disabling a peripheral that has the same ID as the UART will not reset any of the registers that are shared

with the UART. It is therefore important to configure all relevant UART registers explicitly to ensure that it

operates correctly.

See Instantiation on page 18 for details on peripherals and their IDs.

6.24.4 Transmission

A UART transmission sequence is started by triggering the STARTTX task.

Bytes are transmitted by writing to the TXD register. When a byte has been successfully transmitted, the

UART will generate a TXDRDY event after which a new byte can be written to the TXD register. A UART

transmission sequence is stopped immediately by triggering the STOPTX task.

If flow control is enabled, a transmission will be automatically suspended when CTS is deactivated, and

resumed when CTS is activated again, as shown in the following figure. A byte that is in transmission when

CTS is deactivated will be fully transmitted before the transmission is suspended. For more information,

see Suspending the UART on page 342.

N-1

N-2

Figure 129: UART transmission

4463_156 v1.0

341

NRF52820-QDAA-R Datasheet(PDF) 341 Page - Nordic Semiconductor