NRF52820-QDAA-R datasheet(356/437 Pages) NORDIC

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Peripherals

Timeout

11, 12, 13, 14

Figure 134: UARTE reception with forced stop via STOPRX

If HW flow control is enabled through the HWFC field in the CONFIG register, the RTS signal will be

deactivated when the receiver is stopped via the STOPRX task or when the UARTE is only able to receive

four more bytes in its internal RX FIFO.

With flow control disabled, the UARTE will function in the same way as when the flow control is enabled

except that the RTS line will not be used. This means that no signal will be generated when the UARTE has

reached the point where it is only able to receive four more bytes in its internal RX FIFO. Data received

when the internal RX FIFO is filled up, will be lost.

The UARTE receiver will be in its lowest activity level, and consume the least amount of energy, when it is

stopped, i.e. before it is started via STARTRX or after it has been stopped via STOPRX and the RXTO event

has been generated. See POWER — Power supply on page 49 for more information about power modes.

6.25.4 Error conditions

An ERROR event, in the form of a framing error, will be generated if a valid stop bit is not detected in a

frame. Another ERROR event, in the form of a break condition, will be generated if the RXD line is held

active low for longer than the length of a data frame. Effectively, a framing error is always generated

before a break condition occurs.

An ERROR event will not stop reception. If the error was a parity error, the received byte will still be

transferred into Data RAM, and so will following incoming bytes. If there was a framing error (wrong stop

bit), that specific byte will NOT be stored into Data RAM, but following incoming bytes will.

6.25.5 Using the UARTE without flow control

If flow control is not enabled, the interface will behave as if the CTS and RTS lines are kept active all the

time.

6.25.6 Parity and stop bit configuration

Automatic even parity generation for both transmission and reception can be configured using the register

CONFIG on page 370. If odd parity is desired, it can be configured using the register CONFIG on page

370. See the register description for details.

The amount of stop bits can also be configured through the register CONFIG on page 370.

6.25.7 Low power

When putting the system in low power and the peripheral is not needed, lowest possible power

consumption is achieved by stopping, and then disabling the peripheral.

The STOPTX and STOPRX tasks may not be always needed (the peripheral might already be stopped), but if

STOPTX and/or STOPRX is sent, software shall wait until the TXSTOPPED and/or RXTO event is received in

response, before disabling the peripheral through the ENABLE register.

4463_156 v1.0

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NRF52820-QDAA-R Datasheet(PDF) 356 Page - Nordic Semiconductor