NRF52820-QDAA-R datasheet(373/437 Pages) NORDIC

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Peripherals

6.26.3 USB pins

The USBD peripheral features a number of dedicated pins.

The dedicated USB pins can be grouped in two categories, signal and power. The signal pins consist of the

D+ and D- pins, which are to be connected to the USB host. They are dedicated pins, and not available as

standard GPIOs. The USBD peripheral is implemented according to the USB specification revision 2.0, 5V

Short Circuit Withstand ECN Requirement Change, meaning these two pins are not 5 V tolerant.

The signal pins and the pull-up will operate only while VBUS is in its valid voltage range, and USBD is

enabled through the ENABLE register. For details on the USB power supply and VBUS detection, see USB

supply on page 54.

For more information about the pinout, see Pin assignments on page 415.

6.26.4 USBD power-up sequence

The physical layer interface (PHY)/USB transceiver is powered separately from the rest of the device (VBUS

pin), which has some implications on the USBD power-up sequence.

The device is not able to properly signal its presence to the USB host and handle traffic from the host,

unless the PHY's power supply is enabled and stable. Turning the PHY's power supply on/off is directly

linked to register ENABLE. The device provides events that help synchronizing software to the various

steps during the power-up sequence.

To make sure that all resources in USBD are available and the dedicated USB voltage regulator stabilized,

the following is recommended:

• Enable USBD only after VBUS has been detected

• Turn the USB pull-up on after the following events have occurred:

• USBPWRRDY

• USBEVENT, with the READY condition flagged in EVENTCAUSE

The following sequence chart illustrates a typical handling of VBUS power-up:

VBUS

POWER

CLOCK

Software

USBD

VBUS in valid range

USBDETECTED

ENABLE=Enabled

HFCLKSTART

USBEVENT

EVENTCAUSE=READY

USBPWRRDY

HFCLKSTARTED

USBPULLUP=Enabled

HFCLK Crystal

oscillator now starting

USBD has been

initialized, but PHY has

not powered up

PHY is now powered

Enumeration starts

Figure 137: VBUS power-up sequence

Upon detecting VBUS removal, it is recommended to wait for ongoing EasyDMA transfers to finish before

disabling USBD (relevant ENDEPIN[n], ENDISOIN, ENDEPOUT[n], or ENDISOOUT events, see EasyDMA on

page 376). The USBREMOVED event, described in USB supply on page 54, signals when the VBUS is

removed. Reading the ENABLE register will return Enabled until USBD is completely disabled.

4463_156 v1.0

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NRF52820-QDAA-R Datasheet(PDF) 373 Page - Nordic Semiconductor

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