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ST20-C1 Datasheet(PDF) 95 Page - STMicroelectronics

Part # ST20-C1
Description  Instruction Set Reference Manual
PDF  205 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

ST20-C1 Datasheet(HTML) 95 Page - STMicroelectronics

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8 Instruction Set Reference
®
biquad
biquad IIR filter step
Code: 21 F7
Description: Execute a step of a biquad IIR filter on vectors of 16-bit values. Areg
points to the C coefficient vector, Breg points to the X input data vector and Creg
points to the Y results vector. Areg must be word-aligned and Breg and Creg half-
word aligned.
biquad increments Breg and Creg by 2 bytes and performs the five
multiply accumulates Y[2] = X[0].C[0] + X[1].C[1] + X[2].C[2] + Y[0].C[3] + Y[1].C[4].
Definition:
if (
overflow)
if (Status
′
underflo w ≠ set )
Status
′
overflow←set
else if (
underflo w)
if (Status
′
overflow ≠ set ) Status′underflo w←set
else
{
sixteen
′[Creg + 4] ← acc >>
arith23
Breg
′← Breg + 2
Creg
′← Creg + 2
}
where
acc = 1 << 22
+ ((sixteen[Areg] << shift)
× sixteen[Breg])
+ ((sixteen[Areg+2] << shift)
× sixteen[Breg+2])
+ ((sixteen[Areg+4] << shift)
× sixteen[Breg+4])
+ ((sixteen[Areg+6] << shift)
× sixteen[Creg])
+ ((sixteen[Areg+8] << shift)
× sixteen[Creg+2])
–
the value of acc is calculated to 48-bit precision
if (Statusmac_scale = 3) shift = 9
else
shift = 4
× Status
mac_scale
Status Register:
May set underflow or overflow.
Comments:
Areg must be word-aligned.
Breg and Creg must be half-word aligned, and must either be both word-aligned
or neither word-aligned.
This instruction may take 8 memory accesses, which will affect interrupt latency.
See also:
mac, smacloop, umac
Chapter 5.



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