ST20-C1 datasheet(190/205 Pages) STMICROELECTRONICS

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Internal memory

On-chip memory.

Interrupt

A signal from outside the CPU to switch from normal execution to execution of an

interrupt handler. If the interrupt causes a scheduling event, then that may cause

an immediate

trap.

Interrupt controller

An on-chip

peripheral which arbitrates between interrupt requests and signals to

the CPU when an interrupt is required.

Interrupt handler

The code and data which defines the action when an

interrupt is taken.

Interrupt latency

The time taken from receiving an

interrupt signal to starting execution of the

interrupt handler.

Interrupted

process is in an interrupted state if it is waiting for an interrupt handler to

complete and it will continue as soon as the interrupt handler has completed.

IOreg

The input and output register, whose bits are directly connected to

peripherals.

Iptr

The

instruction pointer.

Linked list

A linked list is an ordered data structure where each element includes a pointer to

the next element. A list is identified b y a front pointer, which points to the first

element in the list. Linked lists are also called

queues.

Little-endian

Little-endian ordering of data, used by all ST20s, means that less significant data

is always held in lower addresses. This applies to bits in bytes, bytes in words and

words in memory.

List

See

linked list.

Local

A local variable is one that is addressed by means of an offset from the workspace

pointer. Local variables are usually held on a stack and are defined within a

function or procedure.

cf. non-local.

Logical shift

A shift in which the sign bit is shifted by the same amount as any other bit.

ST20-C1 Datasheet(PDF) 190 Page - STMicroelectronics

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