EMC326SP16AJS-90LL datasheet(11/64 Pages) EMLSI

11 / 64 page

EMC326SP16AJ

2Mx16 CellularRAM

Preliminary

Figure 4: WRITE Operation (ADV# LOW)

Page Mode Read Operation

Page mode is a performance-enhancing extension to the legacy asynchronous READ operation. In page-mode-capable products, an

initial asynchronous read access is performed, then adjacent addresses can be read quickly by simply changing the low-order

address. Addresses A[3:0] are used to determine the members of the 16-address CellularRAM page. Any change in addresses A[4]

or higher will initiate a new tAA access time. Figure 5 shows the timing for a page mode access. Page mode takes advantage of the

fact that adjacent addresses can be read in a shorter period of time than random addresses. WRITE operations do not include

comparable page mode functionality. During asynchronous page mode operation, the CLK input must be held LOW. CE# must be

driven HIGH upon completion of a page mode access. WAIT will be driven while the device is enabled and its state should be ignored.

Page mode is enabled by setting RCR[7] to HIGH. ADV# must be driven LOW during all page mode READ accesses. Due to refresh

considerations, CE# must not be LOW longer than tCEM.

Figure 5: Page Mode READ Operation (ADV# LOW)

Don’t Care

CE#

Address

OE#

LB#/UB#

DATA

tWC = WRITE Cycle Time

Data Valid

Address Valid

WE#

< tCEM

＜

tCEM

Add0

Add1 Add2

Add3

tAA

tAPA

LB#/UB#

OE#

DATA

CE#

Address

Don’t Care

WE#

tAPA

EMC326SP16AJS-90LL Datasheet(PDF) 11 Page - Emerging Memory & Logic Solutions Inc