R5F72115D160FPV datasheet(726/1228 Pages) RENESAS

726 / 1228 page

Section 15 Serial Communication Interface with FIFO (SCIF)

Rev. 2.00 May. 08, 2008 Page 702 of 1200

REJ09B0344-0200

(1)

Transmit/Receive Formats

Table 15.11 lists the eight communication formats that can be selected in asynchronous mode. The

format is selected by settings in the serial mode register (SCSMR).

Table 15.11 Serial Communication Formats (Asynchronous Mode)

SCSMR Bits

Serial Transmit/Receive Format and Frame Length

CHR

PE STOP

START

8-bit data

STOP

START

8-bit data

STOP STOP

START

8-bit data

STOP

START

8-bit data

STOP STOP

START

7-bit data

STOP

START

7-bit data

STOP STOP

START

7-bit data

STOP

START

7-bit data

STOP STOP

[Legend]

START: Start bit

STOP:

Stop bit

Parity bit

(2)

Clock

An internal clock generated by the on-chip baud rate generator or an external clock input from the

SCK pin can be selected as the SCIF transmit/receive clock. The clock source is selected by the

A bit in the serial mode register (SCSMR) and bits CKE[1:0] in the serial control register

(SCSCR). For clock source selection, refer to table 15.10, SCSMR and SCSCR Settings and SCIF

Clock Source Selection.

When an external clock is input at the SCK pin, it must have a frequency equal to 16 times the

desired bit rate.

When the SCIF operates on an internal clock, it can output a clock signal on the SCK pin. The

frequency of this output clock is 16 times the desired bit rate.

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