H8SLASH3022 datasheet(115/712 Pages) RENESAS

115 / 712 page

5. Interrupt Controller

Rev.2.00 Mar. 22, 2007 Page 91 of 684

REJ09B0352-0200

5.2.5

IRQ Sense Control Register (ISCR)

ISCR is an 8-bit readable/writable register that selects level sensing or falling-edge sensing of the

inputs at pins

IRQ

5, IRQ4, IRQ1, and IRQ0

Bit

Initial value

Read/Write

—

R/W

These bits select level sensing or falling-edge

sensing for IRQ5 and IRQ4 interrupts

—

R/W

IRQ5SC

R/W

IRQ4SC

R/W

—

R/W

—

R/W

IRQ1SC

R/W

IRQ0SC

R/W

IRQ and IRQ sense control

These bits select level sensing or falling-edge

sensing for IRQ1 and IRQ0 interrupts

IRQ and IRQ sense control

Reserved bits

ISCR is initialized to H'00 by a reset and in hardware standby mode.

Bits 7, 6, 3, and 2—Reserved: These bits are readable/writable and do not affect selection of

level sensing or falling-edge sensing.

Bits 5, 4, 1, and 0—IRQ

5, IRQ4, IRQ1,,and IRQ0 Sense Control (IRQ5SC, IRQ4SC, IRQ1SC,

IRQ0SC): These bits selects whether interrupts IRQ

5, IRQ4, IRQ1, IRQ0 are requested by level

sensing of pins

IRQ

5, IRQ4, IRQ1, IRQ0 or by falling-edge sensing.

Bits 5, 4, 1, and 0

IRQ5SC, IRQ4SC,

IRQ1SC, IRQ0SC

Description

Interrupts are requested when

IRQ

5, IRQ4, IRQ1, IRQ0

inputs are low

(Initial value)

Interrupts are requested by falling-edge input at

IRQ

4, IRQ1, IRQ0

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