H8SLASH3021 datasheet(229/712 Pages) RENESAS

229 / 712 page

8. 16-Bit Integrated Timer Unit (ITU)

Rev.2.00 Mar. 22, 2007 Page 205 of 684

REJ09B0352-0200

Bit 0—PWM Mode 0 (PWM0): Selects whether channel 0 operates normally or in PWM mode.

Bit

PWM0

Description

Channel 0 operates normally

(Initial value)

Channel 0 operates in PWM mode

When bit PWM0 is set to 1 to select PWM mode, pin TIOCA0 becomes a PWM output pin. The

output goes to 1 at compare match with general register A0 (GRA0), and to 0 at compare match

with general register B0 (GRB0).

8.2.4

Timer Function Control Register (TFCR)

TFCR is an 8-bit readable/writable register that selects complementary PWM mode, reset-

synchronized PWM mode, and buffering for channels 3 and 4.

Bit

Initial value

Read/Write

—

CMD1

R/W

CMD0

R/W

BFB4

R/W

BFA3

R/W

BFA4

R/W

BFB3

R/W

Reserved bits

Combination mode 1/0

These bits select complementary

PWM mode or reset-synchronized

PWM mode for channels 3 and 4

Buffer mode B4 and A4

These bits select buffering of

general registers (GRB4 and

GRA4) by buffer registers

(BRB4 and BRA4) in channel 4

Buffer mode B3 and A3

These bits select buffering

of general registers (GRB3

and GRA3) by buffer

registers (BRB3 and BRA3)

in channel 3

TFCR is initialized to H'C0 by a reset and in standby mode.

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