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H8/3021 Datasheet(PDF) 282 Page - Renesas Technology Corp |
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H8/3021 Datasheet(HTML) 282 Page - Renesas Technology Corp |
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282 / 712 page  8. 16-Bit Integrated Timer Unit (ITU) Rev.2.00 Mar. 22, 2007 Page 258 of 684 REJ09B0352-0200 8.4.8 Buffering Buffering operates differently depending on whether a general register is an output compare register or an input capture register, with further differences in reset-synchronized PWM mode and complementary PWM mode. Buffering is available only in channels 3 and 4. Buffering operations under the conditions mentioned above are described next. • General register used for output compare The buffer register value is transferred to the general register at compare match. See figure 8.46. Compare match signal Comparator TCNT GR BR Figure 8.46 Compare Match Buffering • General register used for input capture The TCNT value is transferred to the general register at input capture. The previous general register value is transferred to the buffer register. See figure 8.47. Input capture signal BR GR TCNT Figure 8.47 Input Capture Buffering |
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