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H8/3021 Datasheet(PDF) 283 Page - Renesas Technology Corp |
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H8/3021 Datasheet(HTML) 283 Page - Renesas Technology Corp |
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283 / 712 page  8. 16-Bit Integrated Timer Unit (ITU) Rev.2.00 Mar. 22, 2007 Page 259 of 684 REJ09B0352-0200 • Complementary PWM mode The buffer register value is transferred to the general register when TCNT3 and TCNT4 change counting direction. This occurs at the following two times: ⎯ When TCNT3 matches GRA3 ⎯ When TCNT4 underflows • Reset-synchronized PWM mode The buffer register value is transferred to the general register at compare match A3. Sample Buffering Setup Procedure: Figure 8.48 shows a sample buffering setup procedure. Buffering Select general register functions Set buffer bits Start counters Buffered operation 11. 2. 3. 2 3 Set TIOR to select the output compare or input capture function of the general registers. Set bits BFA3, BFA4, BFB3, and BFB4 in TFCR to select buffering of the required general registers. Set the STR bits to 1 in TSTR to start the timer counters. Figure 8.48 Buffering Setup Procedure (Example) |
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