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H8/3003 Datasheet(PDF) 482 Page - Renesas Technology Corp |
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H8/3003 Datasheet(HTML) 482 Page - Renesas Technology Corp |
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482 / 715 page ![]() In transmitting serial data, the SCI operates as follows. • The SCI monitors the TDRE flag in SSR. When the TDRE flag is cleared to 0 the SCI recognizes that TDR contains new data, and loads this data from TDR into TSR. • After loading the data from TDR into TSR, the SCI sets the TDRE flag to 1 and starts transmitting. If the TIE bit in SCR is set to 1, the SCI requests a transmit-data-empty interrupt (TXI) at this time. Serial transmit data is transmitted in the following order from the TxD pin: — Start bit: One 0 bit is output. — Transmit data: 7 or 8 bits are output, LSB first. — Multiprocessor bit: One multiprocessor bit (MPBT value) is output. — Stop bit: One or two 1 bits (stop bits) are output. — Mark state: Output of 1 bits continues until the start bit of the next transmit data. • The SCI checks the TDRE flag when it outputs the stop bit. If the TDRE flag is 0, the SCI loads data from TDR into TSR, outputs the stop bit, then begins serial transmission of the next frame. If the TDRE flag is 1, the SCI sets the TEND flag in SSR to 1, outputs the stop bit, then continues output of 1 bits in the mark state. If the TEIE bit is set to 1 in SCR, a transmit-end interrupt (TEI) is requested at this time. Figure 13-11 shows an example of SCI transmit operation using a multiprocessor format. Figure 13-11 Example of SCI Transmit Operation (8-Bit Data with Multiprocessor Bit and One Stop Bit) 1 Start bit 0 D0 D1 D7 0/1 Stop bit 1 Data Multi- processor bit Start bit 0 D0 D1 D7 0/1 Stop bit 1 Data 1 Idle (mark) state TDRE TEND TXI request TXI interrupt handler writes data in TDR and clears TDRE flag to 0 TXI request 1 frame TEI request Serial data Multi- processor bit 464 |
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