H8SLASH3003 datasheet(8/715 Pages) RENESAS

8 / 715 page

6.4.2

6.4.3

BREQ Input Timing........................................................................................ 133

Section 7

Refresh Controller .................................................................................... 135

7.1

Overview ........................................................................................................................ 135

7.1.1

Features........................................................................................................... 135

7.1.2

Block Diagram................................................................................................ 136

7.1.3

Input/Output Pins............................................................................................ 137

7.1.4

7.2

Register Descriptions...................................................................................................... 138

7.2.1

Refresh Control Register (RFSHCR) ............................................................. 138

7.2.2

Refresh Timer Control/Status Register (RTMCSR) ....................................... 141

7.2.3

Refresh Timer Counter (RTCNT)................................................................... 143

7.2.4

Refresh Time Constant Register (RTCOR) .................................................... 143

7.3

Operation ........................................................................................................................ 144

7.3.1

Area Division.................................................................................................. 144

7.3.2

DRAM Refresh Control.................................................................................. 145

7.3.3

Pseudo-Static RAM Refresh Control.............................................................. 160

7.3.4

Interval Timing ............................................................................................... 165

7.4

Interrupt Source .............................................................................................................. 171

7.5

Usage Notes .................................................................................................................... 171

Section 8

DMA Controller ........................................................................................ 173

8.1

Overview ........................................................................................................................ 173

8.1.1

Features........................................................................................................... 173

8.1.2

Block Diagram................................................................................................ 174

8.1.3

Functional Overview....................................................................................... 175

8.1.4

Input/Output Pins............................................................................................ 176

8.1.5

8.2

8.2.1

Memory Address Registers (MAR)................................................................ 180

8.2.2

I/O Address Registers (IOAR)........................................................................ 181

8.2.3

Execute Transfer Count Registers (ETCR)..................................................... 181

8.2.4

Data Transfer Control Registers (DTCR) ....................................................... 183

8.3

8.3.1

Memory Address Registers (MAR)................................................................ 187

8.3.2

I/O Address Registers (IOAR)........................................................................ 187

8.3.3

Execute Transfer Count Registers (ETCR)..................................................... 188

8.3.4

Data Transfer Control Registers (DTCR) ....................................................... 190

8.4

Operation ........................................................................................................................ 196

8.4.1

Overview......................................................................................................... 196

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