H8SLASH3003 datasheet(85/715 Pages) RENESAS

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4.2 Reset

4.2.1 Overview

A reset is the highest-priority exception. When the

RES pin goes low, all processing halts and the

H8/3003 enters the reset state. A reset initializes the internal state of the CPU and the registers of

the on-chip supporting modules. Reset exception handling begins when the

RES pin changes from

low to high.

The H8/3003 can also be reset by overflow of the watchdog timer. For details see section 12,

Watchdog Timer.

4.2.2 Reset Sequence

The H8/3003 enters the reset state when the

RES pin goes low.

To ensure that the H8/3003 is reset, hold the

RES pin low for at least 20 ms at power-up. To reset

the H8/3003 during operation, hold the

RES pin low for at least 10 system clock (ø) cycles. See

appendix D.2, Pin States at Reset, for the states of the pins in the reset state.

When the

RES pin goes high after being held low for the necessary time, the H8/3003 starts reset

exception handling as follows.

•

The internal state of the CPU and the registers of the on-chip supporting modules are

initialized, and the I bit is set to 1 in CCR.

•

The contents of the reset vector address (H'0000 to H'0003) are read, and program execution

starts from the address indicated in the vector address.

Figure 4-2 shows the reset sequence in modes 1 and 3. Figure 4-3 shows the reset sequence in

modes 2 and 4.

H8/3003 Datasheet(PDF) 85 Page - Renesas Technology Corp