 |
Electronic Components Datasheet Search |
|
|
Electronic Components Datasheet Search |
|
H8/3003 Datasheet(PDF) 509 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
H8/3003 Datasheet(HTML) 509 Page - Renesas Technology Corp |
|
|
509 / 715 page  14.2.3 A/D Control Register (ADCR) ADCR is an 8-bit readable/writable register that enables or disables external triggering of A/D conversion. ADCR is initialized to H'7F by a reset and in standby mode. Bit 7—Trigger Enable (TRGE): Enables or disables external triggering of A/D conversion. Bit 7 TRGE Description 0 A/D conversion cannot be externally triggered (Initial value) 1 A/D conversion starts at the falling edge of the external trigger signal ( ADTRG) Bits 6 to 0—Reserved: Read-only bits, always read as 1. Bit Initial value Read/Write 7 TRGE 0 R/W 6 — 1 — 5 — 1 — 4 — 1 — 3 — 1 — 0 — 1 — 2 — 1 — 1 — 1 — Trigger enable Enables or disables external triggering of A/D conversion Reserved bits 491 |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |
New Zealand ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
