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H8/3003 Datasheet(PDF) 659 Page - Renesas Technology Corp |
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H8/3003 Datasheet(HTML) 659 Page - Renesas Technology Corp |
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659 / 715 page  RFSHCR—Refresh Control Register H'AC Refresh controller Bit Initial value Read/Write 7 SRFMD 0 R/W 6 PSRAME 0 R/W 5 DRAME 0 R/W 4 CAS/ 0 R/W 3 M9/ 0 R/W 0 RCYCE 0 R/W 2 RFSHE 0 R/W 1 — 1 — Self-refresh mode 0 DRAM or PSRAM self-refresh is disabled in software standby mode 1 DRAM or PSRAM self-refresh is enabled in software standby mode Refresh cycle enable Refresh pin enable PSRAM enable, DRAM enable 0 Refresh cycles are disabled 1 Refresh cycles are enabled for area 3 Address multiplex mode select 0 8-bit column address mode 1 9-bit column address mode WE M8 Strobe mode select 0 1 0 2 mode 1 2 mode Can be used as an interval timer PSRAM can be connected Illegal setting Bit 6 0 1 Bit 5 0 0 1 RAM Interface PSRAME DRAME DRAM can be connected 1 Refresh signal output at the pin is disabled Refresh signal output at the pin is enabled RFSH RFSH WE CAS 641 |
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