H8SLASH3003 datasheet(273/715 Pages) RENESAS

273 / 715 page

Port 8 Data Direction Register (P8DDR): P8DDR is an 8-bit write-only register that can select

input or output for each pin in port 8.

When bits in P8DDR bit are set to 1, P84 to P81 become CS0 to CS3 output pins and P80 becomes

a generic output pin. When bits in P8DDR are cleared to 0, the corresponding pins become input

pins.

P8DDR is a write-only register. Its value cannot be read. All bits return 1 when read.

P8DDR is initialized to H'F0 by a reset and in hardware standby mode. In software standby mode

it retains its previous setting, so if a P8DDR bit is set to 1, the corresponding pin maintains its

output state in software standby mode.

Port 8 Data Register (P8DR): P8DR is an 8-bit readable/writable register that stores data for pins

P84 to P80.

When a bit in P8DDR is set to 1, if port 8 is read the value of the corresponding P8DR bit is

returned directly. When a bit in P8DDR is cleared to 0, if port 8 is read the corresponding pin level

is read.

Bits 7 to 5 are reserved. They cannot be modified and always read 1.

P8DR is initialized to H'E0 by a reset and in hardware standby mode. In software standby mode it

retains its previous setting.

Bit

Initial value

Read/Write

—

P8 DDR

Reserved bits

Port 8 data direction 4 to 0

These bits select input or

output for port 8 pins

Bit

Initial value

Read/Write

—

R/W

Reserved bits

Port 8 data 4 to 0

These bits store data

for port 8 pins

255

H8/3003 Datasheet(PDF) 273 Page - Renesas Technology Corp