M38K09RFS datasheet(192/328 Pages) RENESAS

192 / 328 page

2.4 Serial I/O

Rev.2.00

Oct 05, 2006

page 63 of 111

38K0 Group

REJ09B0337-0200

APPLICATION

Fig. 2.4.32 Registers setting related to receiving side

Receiving side

Serial I/O status register (Address : 2716)

SIOSTS

BRG

Serial I/O control register (Address : 0FE016)

SIOCON

10 0

UARTCON

UART control register (Address : 0FE116)

Character length selection bit : 8 bits

Parity enable bit : Parity checking disabled

Stop bit length selection bit : 2 stop bits

Baud rate generator (Address : 0FE216)

f(XIN)

Transfer bit rate ✕ 16 ✕ m

–1

Set

When bit 0 of the Serial I/O control register (Address : 0FE016) is set to “0,”

a value of m is 1.

When bit 0 of the Serial I/O control register (Address : 0FE016) is set to “1,”

a value of m is 4.

✽

BRG count source selection bit : f(XIN)

Serial I/O synchronous clock selection bit : BRG/16

Transmit enable bit : Transmit disabled

Receive enable bit : Receive enabled

Serial I/O mode selection bit : Asynchronous serial I/O(UART)

Serial I/O enable bit : Serial I/O enabled

SRDY

output enable bit : SRDY out disabled

Receive buffer full flag

Confirm completion of receiving 1-byte data with this flag.

“1” : At completing reception

“0” : At reading out contents of Receive buffer register

Overrun error flag

“1” : When data is ready in Receive shift register while Receive buffer

Parity error flag

“1” : When a parity error occurs in enabled parity.

Framing error flag

“1” : When stop bits cannot be detected at the specified timing.

Summing error flag

“1” : When any one of the following errors occurs.

• Overrun error

• Parity error

• Framing error

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