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AT89LP6440 Datasheet(PDF) 37 Page - ATMEL Corporation |
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AT89LP6440 Datasheet(HTML) 37 Page - ATMEL Corporation |
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37 / 194 page ![]() 37 3706A–MICRO–9/09 AT89LP6440 - Preliminary Figure 8-1. Interrupt Recovery from Power-down (PWDEX = 0) When PWDEX = “1”, the wake-up period is controlled externally by the interrupt. Again, at the falling edge on the interrupt pin, power-down is exited and the oscillator is restarted. However, the internal clock will not propagate until the rising edge of the interrupt pin as shown in Figure 8- 2. The interrupt pin should be held low long enough for the selected clock source to stabilize. After the rising edge on the pin the interrupt service routine will be executed. Figure 8-2. Interrupt Recovery from Power-down (PWDEX = 1) 8.2.2 Reset Recovery from Power-down The wake-up from Power-down through an external reset is similar to the interrupt with PWDEX = “0”. At the falling edge of RST, Power-down is exited, the oscillator is restarted, and an internal timer begins counting as shown in Figure 8-3. The internal clock will not be allowed to propagate to the CPU until after the timer has timed out. The time-out period is controlled by the Start-up Timer Fuses. (See Table 7-1 on page 34). If RST returns high before the time-out, a two clock cycle internal reset is generated when the internal clock restarts. Otherwise, the device will remain in reset until RST is brought high. 8.3 Reducing Power Consumption Several possibilities need consideration when trying to reduce the power consumption in an AT89LP-based system. Generally, Idle or Power-down mode should be used as much as possi- ble. All unneeded functions should be disabled. In particular, the following modules may need special consideration when trying to achieve the lowest possible power consumption. 8.3.1 Brown-out Detector If the Brown-out Detector is not needed by the application, this module should be turned off. If the Brown-out Detector is enabled by the BOD Enable Fuse, it will be enabled in all modes except Power-down. See Section 25.7 “User Configuration Fuses” on page 164. PWD INT1 XTAL1 tSUT Internal Clock PWD INT1 XTAL1 Internal Clock |
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