MMA8450QT datasheet(32/57 Pages) FREESCALE

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MMA8450Q

0x24 FF_MT_SRC_1 Register

This register keeps track of the acceleration event which is triggering (or has triggered, in case of ELE bit in FF_MT_CFG_1

register being set to 1) the event flag. In particular EA is set to a logic 1 when the logical combination of acceleration events flags

specified in FF_MT_CFG_1 register is true. This bit is used in combination with the values in INT_EN_FF_MT_1 and

INT_CFG_FF_MT_1 register to generate the Freefall/Motion interrupts.

An X,Y, or Z high or an X,Y, and Z high event is true when the acceleration value of the X or Y or Z axes is higher than the

preset threshold value defined in the FF_MT_THS_1 register.

Conversely X,Y, or Z high or an X,Y, and Z low event is true when the acceleration value of the X and Y and Z axes are lower

than the preset threshold value defined in the FF_MT_THS_1 register.

When the ELE bit is set, only the EA bit is latched. The other bits are not latched. To see the events that have been detected,

the register must be read immediately. The EA bit will remain high until the source register is read.

0x25: FF_MT_THS_1 Freefall and Motion Threshold 1 Register

The minimum threshold resolution is dependent on the selected acceleration g range and the threshold register has a range

of 0 to 127.

Therefore:

•

If the selected acceleration g range is 8g mode (FS = 11), the minimum threshold resolution is 0.063g/LSB. The maximum

value is 8g.

•

If the selected acceleration g range is 4g mode (FS = 10), the minimum threshold resolution is 0.0315g/LSB. The

maximum value is 4g.

•

If the selected acceleration g range is 2g mode (FS = 01), the minimum threshold resolution is 0.01575g/LSB. The

maximum value is 2g.

When DBCNTM bit is a logic ‘1’, the debounce counter is cleared to 0 whenever the event of interest is no longer true (Figure

12 part b) while if the DBCNTM bit is set a logic ‘0’ the debounce counter is decremented by 1 whenever the event of interest is

no longer true (Figure 12 part c) until the debounce counter reaches 0 or the event of interest becomes active.

Decrementing of the debounce counter acts as a median filter enabling the system to filter out irregular spurious events which

might impede the detection of the event.

0x24: FF_MT_SRC_ Freefall and Motion Source Register (0x24) (Read Only)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

—

ZHE

ZLE

YHE

YLE

XHE

XLE

Table 34. FF_MT_SRC_1 Description

Event Active Flag. Default value: 0

0: No event flag has been asserted; 1: one or more event flags have been asserted.

ZHE

Z High Event Flag. Default value: 0

0: No Z High event detected, 1: Z High event has been detected

ZLE

Z Low Event Flag. Default value: 0

0: No Z Low event detected, 1: Z Low event has been detected

YHE

Y High Event Flag. Default value: 0

0: No Y High event detected, 1: Y High event has been detected

YLE

Y Low Event Flag. Default value: 0

0: No Y Low event detected, 1: Y Low event has been detected

XHE

X High Event Flag. Default value: 0

0: No X High event detected, 1: X High event has been detected

XLE

X Low Event Flag. Default value: 0

0: No X Low event detected, 1: X Low event has been detected

0x25 FF_MT_THS_1 Register (Read/Write)

Bit 7

Bit 6

Bit 5

Bit 4

Bit 3

Bit 2

Bit 1

Bit 0

DBCNTM

THS6

THS5

THS4

THS3

THS2

THS1

THS0

Table 35. FF_MT_THS_1 Description

DBCNTM

Debounce counter mode selection. Default value: 0.

0: increments or decrements debounce, 1: increments or clears counter.

THS[6:0]

Freefall /Motion Threshold: default value: 000 0000

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