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P89LPC9151FDH Datasheet(PDF) 46 Page - NXP Semiconductors |
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P89LPC9151FDH Datasheet(HTML) 46 Page - NXP Semiconductors |
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46 / 91 page ![]() P89LPC9151_61_71_2 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 02 — 9 February 2010 46 of 91 NXP Semiconductors P89LPC9151/9161/9171 8-bit microcontroller with 8-bit ADC Every output on the P89LPC9151/9161/9171 has been designed to sink typical LED drive current. However, there is a maximum total output current for all ports which must not be exceeded. Please refer to Table 16 “Static characteristics” for detailed specifications. All ports pins that can function as an output have slew rate controlled outputs to limit noise generated by quickly switching output signals. The slew rate is factory-set to approximately 10 ns rise and fall times. 7.16 Power monitoring functions The P89LPC9151/9161/9171 incorporates power monitoring functions designed to prevent incorrect operation during initial power-up and power loss or reduction during operation. This is accomplished with two hardware functions: Power-on detect and brownout detect. 7.16.1 Brownout detection The brownout detect function determines if the power supply voltage drops below a certain level. Enhanced brownout detection has 3 independent functions: BOD reset, BOD interrupt and BOD FLASH. BOD reset is always on except in total Power-down mode. It could not be disabled in software. BOD interrupt may be enabled or disabled in software. BOD FLASH is always on, except in Power-down modes and could not be disabled in software. BOD reset and BOD interrupt, each has four trip voltage levels. BOE1 bit (UCFG1.5) and BOE0 bit (UCFG1.3) are used as trip point configuration bits of BOD reset. BOICFG1 bit and BOICFG0 bit in register BODCFG are used as trip point configuration bits of BOD interrupt. BOD reset voltage should be lower than BOD interrupt trip point. BOD FLASH is used for flash programming/erase protection and has only 1 trip voltage of 2.4 V. Please refer to P89LPC9151/9161/9171 User manual for detail configurations. If brownout detection is enabled the brownout condition occurs when VDD falls below the brownout trip voltage and is negated when VDD rises above the brownout trip voltage. For correct activation of brownout detect, the VDD rise and fall times must be observed. Please see Table 16 “Static characteristics” for specifications. 7.16.2 Power-on detection The Power-on detect has a function similar to the brownout detect, but is designed to work as power comes up initially, before the power supply voltage reaches a level where brownout detect can work. The POF flag in the RSTSRC register is set to indicate an initial power-up condition. The POF flag will remain set until cleared by software. 7.17 Power reduction modes The P89LPC9151/9161/9171 supports three different power reduction modes. These modes are Idle mode, Power-down mode, and total Power-down mode. 7.17.1 Idle mode Idle mode leaves peripherals running in order to allow them to activate the processor when an interrupt is generated. Any enabled interrupt source or reset may terminate Idle mode. |
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