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P89LPC9151FDH Datasheet(PDF) 60 Page - NXP Semiconductors |
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P89LPC9151FDH Datasheet(HTML) 60 Page - NXP Semiconductors |
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60 / 91 page ![]() P89LPC9151_61_71_2 © NXP B.V. 2010. All rights reserved. Product data sheet Rev. 02 — 9 February 2010 60 of 91 NXP Semiconductors P89LPC9151/9161/9171 8-bit microcontroller with 8-bit ADC board area. The ICP function uses five pins. Only a small connector needs to be available to interface your application to a commercial programmer in order to use this feature. Additional details may be found in the P89LPC9151/9161/9171 User manual. 7.28.7 IAP-Lite IAP-Lite is performed in the application under the control of the microcontroller’s firmware. The IAP facility consists of internal hardware resources to facilitate programming and erasing. The IAP-Lite operations are accomplished through the use of four SFRs consisting of a control/status register, a data register, and two address registers. Additional details may be found in the P89LPC9151/9161/9171 User’s Manual. 7.29 User configuration bytes Some user-configurable features of the P89LPC9151/9161/9171 must be defined at power-up and therefore cannot be set by the program after start of execution. These features are configured through the use of the flash byte UCFG1 and UCFG2. Please see the P89LPC9151/9161/9171 User’s Manual for additional details. 7.30 User sector security bytes There are 8 User Sector Security Bytes on the P89LPC9151/9161/9171. Each byte corresponds to one sector. Please see the P89LPC9151/9161/9171 User manual for additional details. 8. ADC 8.1 General description The P89LPC9151/9161/9171 devices have a single 8-bit, 4-channel multiplexed analog-to-digital converter. A block diagram of the A/D converter is shown in Figure 21. The A/D consists of a 4-input multiplexer which feeds a sample-and-hold circuit providing an input signal to one of two comparator inputs. The control logic in combination with the SAR drives a digital-to-analog converter which provides the other input to the comparator. The output of the comparator is fed to the SAR. 8.2 Features 8-bit, 4-channel multiplexed input, successive approximation ADC. Four A/D result registers. Six operating modes: Fixed channel, single conversion mode. Fixed channel, continuous conversion mode. Auto scan, single conversion mode. Auto scan, continuous conversion mode. Dual channel, continuous conversion mode. Single step mode. Three conversion start modes: Timer triggered start. Start immediately. |
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