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MC9S08DN60F1CLF Datasheet(PDF) 51 Page - Freescale Semiconductor, Inc |
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MC9S08DN60F1CLF Datasheet(HTML) 51 Page - Freescale Semiconductor, Inc |
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51 / 356 page ![]() Chapter 4 Memory MC9S08DN60 Series Data Sheet, Rev 3 Freescale Semiconductor 51 program time provided that the conditions above are met. If the next sequential address is the beginning of a new row, the program time for that byte will be the standard time instead of the burst time. This is because the high voltage to the array must be disabled and then enabled again. If a new burst command has not been queued before the current command completes, then the charge pump will be disabled and high voltage removed from the array. A flowchart to execute the burst program operation is shown in Figure 4-3. Figure 4-3. Burst Program Flowchart 1 0 FCBEF? START WRITE TO Flash TO BUFFER ADDRESS AND DATA WRITE COMMAND TO FCMD NO YES FPVIOL OR WRITE 1 TO FCBEF TO LAUNCH COMMAND AND CLEAR FCBEF (2) NO YES NEW BURST COMMAND? 1 0 FCCF? ERROR EXIT DONE (2) Wait at least four bus cycles before checking FCBEF or FCCF. 1 0 FACCERR? CLEAR ERROR FACCERR? WRITE TO FCDIV(1) (1) Required only once after reset. BURST PROGRAM FLOW |
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