TLK6002 datasheet(39/96 Pages) TI

39 / 96 page

LossOfSync

(Enable Alignment)

SyncStatusNotOk

Reset | (6.6 & LOS(LossofSignal))

Comma

NoComma

CommaDetect 1

(Disable Alignment)

Comma

!Comma & !InvalidDecode

CommaDetect 2

Comma

!Comma & !InvalidDecode

CommaDetect 3

Comma

!Comma & !InvalidDecode

Sync Acquired 1

(SyncStatusOk)

Sync Acquired 2

(goodcgs = 0)

Sync Acquired 3

(goodcgs = 0)

Sync Acquired 4

(goodcgs = 0)

InvalidDecode

Invalid

Decode

Invalid

Decode

Invalid

Decode

Invalid

Decode

Sync Acquired 2A

goodcgs++

!InvalidDecode&

good_cgs !=3

!invalidDecode &

good_cgs=3

Sync Acquired 4A

goodcgs++

!InvalidDecode &

good_cgs !=3

!invalidDecode &

good_cgs=3

Sync Acquired 3A

goodcgs++

!InvalidDecode &

good_cgs !=3

!invalidDecode &

good_cgs=3

InvalidDecode

Note:

IfCH_SYNC_HYSTERESIS[1:0](3.12:11) isequalto 2'b00),

machineoperatesasdrawn.

IfCH_SYNC_HYSTERESIS[1:0](3.12:11) isequalto 2'b01/

2’b10/2'b11, thenatransitionfromallSync Acquiredstates

occursimmediatelyupondetectionof 1, 2, or 3 adjacent

invalidcodewordsordisparityerrorsrespectively.

!Invalid

Decode

!Invalid

Decode

!Invalid

Decode

TLK6002

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SLLSE34 – MAY 2010

2.22.2 Receive Parallel Output Clock During ARS Mode

Per channel ARS_RX_CLK_EN (register bit 10.15) allows software programmability as to whether the

recovered output byte clock (RXCLK_A/B) is allowed to toggle (dynamically changing rates as the ARS

rate determination process executes), or if it is held fixed to zero until the incoming serial rate for the

channel has been determined. At the time rate determination is successful, the receive parallel output

interface clock is automatically allowed to toggle if it was prevented from toggling during ARS (and

enabling toggling is not delayed or gated by MDIO interaction in the case where ARS_TX_MDIO_GATE is

asserted).

Figure 2-14. Channel Synchronization Flowchart

Description

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