TLK6002 datasheet(79/96 Pages) TI

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TLK6002

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SLLSE34 – MAY 2010

4.18.2 16-Bit Interface Mode (8b/10b Encoder/Decoder Enabled) (All CPRI/OBSAI Rates)

Note: Assume both channel A and channel B have the same setup.

REFCLK frequency = 122.88 MHz, Mode = Transceiver, Parallel Interface = 16-Bit DDR Source Aligned

Mode, RXCLK_A/B out = RXBCLK_A/B, Serial Data Rate is CPRI/OBSAI standard rate as shown below.

•

Device Pin Setting(s) – Pin settings allow for maximum software configurability.

–

Ensure CODEA_EN input pin is Low.

–

Ensure CODEB_EN input pin is Low.

–

Ensure RATE_A[2:0] input pins are 3’b100 (High, Low, Low) to enable software control.

–

Ensure RATE_B[2:0] input pins are 3’b100 (High, Low, Low) to enable software control.

–

Ensure PD_TRXA_N input pin is High.

–

Ensure PD_TRXB_N input pin is High.

–

Ensure PRBS_EN input pin is Low.

–

Ensure REFCLK_A_SEL input pin is Low to enable software control.

–

Ensure REFCLK_B_SEL input pin is Low to enable software control.

•

Reset Device

–

Issue a hard or soft reset (RESET_N asserted for at least 10 us -or- Write 1’b1 to 0.15

GLOBAL_RESET) after power supply stabilization.

•

Enable MDIO global write so that each MDIO write affects both channels to shorten provisioning time

–

Write 1’b1 to 0.11 GLOBAL_WRITE

•

Clock Configuration

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Select Channel A SERDES REFCLK input (Default = REFCLK_0_P/N)

•

If REFCLK_0_P/N used – Write 1’b0 to 0.1 REFCLK_A_SEL

•

If REFCLK_1_P/N used – Write 1’b1 to 0.1 REFCLK_A_SEL

–

Select Channel B SERDES REFCLK input (Default = REFCLK_0_P/N)

•

If REFCLK_0_P/N used – Write 1’b0 to 0.0 REFCLK_B_SEL

•

If REFCLK_1_P/N used – Write 1’b1 to 0.0 REFCLK_B_SEL

•

Data Rate Setting (select one of the following 8 cases)

–

If serial data rate is 6144.00Mbps: Write 2’b00 to 1.7:6 RATE_TX[1:0], write 2’b00 to 1.5:4

RATE_RX[1:0], write 4’b1110 to 1.3:0 PLL_MULT[3:0] to select FULL rate and 25x MPY

(CHANNEL_CONTROL_1 = 0x010E).

–

If serial data rate is 4915.20Mbps: Write 2’b00 to 1.7:6 RATE_TX[1:0], write 2’b00 to 1.5:4

RATE_RX[1:0], write 4’b1101 to 1.3:0 PLL_MULT[3:0] to select FULL rate and 20x MPY

(CHANNEL_CONTROL_1 = 0x010D).

–

If serial data rate is 3072.00Mbps: Write 2’b01 to 1.7:6 RATE_TX[1:0], write 2’b01 to 1.5:4

RATE_RX[1:0], write 4’b1110 to 1.3:0 PLL_MULT[3:0] to select HALF rate and 25x MPY

(CHANNEL_CONTROL_1 = 0x015E).

–

If serial data rate is 2457.60Mbps: Write 2’b01 to 1.7:6 RATE_TX[1:0], write 2’b01 to 1.5:4

RATE_RX[1:0], write 4’b1101 to 1.3:0 PLL_MULT[3:0] to select HALF rate and 20x MPY

(CHANNEL_CONTROL_1 = 0x015D).

–

If serial data rate is 1536.00Mbps: Write 2’b10 to 1.7:6 RATE_TX[1:0], write 2’b10 to 1.5:4

RATE_RX[1:0], write 4’b1110 to 1.3:0 PLL_MULT[3:0] to select QUARTER rate and 25x MPY

(CHANNEL_CONTROL_1 = 0x01AE).

–

If serial data rate is 1228.80Mbps: Write 2’b10 to 1.7:6 RATE_TX[1:0], write 2’b10 to 1.5:4

RATE_RX[1:0], write 4’b1101 to 1.3:0 PLL_MULT[3:0] to select QUARTER rate and 20x MPY

(CHANNEL_CONTROL_1 = 0x01AD).

–

If serial data rate is 768.00Mbps: Write 2’b11 to 1.7:6 RATE_TX[1:0], write 2’b11 to 1.5:4

RATE_RX[1:0], write 4’b1110 to 1.3:0 PLL_MULT[3:0] to select EIGHTH rate and 25x MPY

(CHANNEL_CONTROL_1 = 0x01FE).

–

If serial data rate is 614.40Mbps: Write 2’b11 to 1.7:6 RATE_TX[1:0], write 2’b11 to 1.5:4

ELECTRICAL SPECIFICATIONS

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