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7549 Datasheet(PDF) 53 Page - Renesas Technology Corp |
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7549 Datasheet(HTML) 53 Page - Renesas Technology Corp |
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53 / 86 page ![]() Rev.2.02 Mar 31, 2009 Page 51 of 81 REJ03B0202-0202 7549 Group Fig 66. φSOURCE state transition • XIN HSOCO “S” LSOCO “S” xx10x011 XIN “O” HSOCO “O” • LSOCO xx00x000 XIN “S” HSOCO “S” • LSOCO xx00x110 XIN “S” • HSOCO LSOCO “S” xx01x101 • XIN HSOCO “O” LSOCO “S” xx10x001 XIN “O” HSOCO “S” • LSOCO xx00x010 XIN “S” HSOCO “O” • LSOCO xx00x100 • XIN HSOCO “O” LSOCO “O” xx10x000 XIN “O” • HSOCO LSOCO “O” xx01x000 • XIN HSOCO “S” LSOCO “O” xx10x010 XIN “S” • HSOCO LSOCO “O” xx01x100 XIN “O” • HSOCO LSOCO “S” xx01x001 High-speed on-chip oscillator (HSOCO): oscillation start b1=0 XIN oscillation: oscillation start (Note 3) b2=0 Low-speed on-chip oscillator (LSOCO): oscillation start b0=0 HSOCO Oscillation (b1=0) Stop (b1=1) HSOCO Oscillation (b1=0) Stop (b1=1) φSOURCE selection XIN (b5,4=1,0) (Note 3) LSOCO (b5,4=0,0) LSOCO Stop (b0=1) Oscillation (b0=0) X IN Oscillation (b2=0) Stop (b2=1) b2 b5,4 (Note 3) b1,0 b0 (Note 1) b0 (Note 1) b2 b0 (Note 1) b2,0 (Note 1) b2 b2,1 (Note 1) b0 (Note 1) b2,0 (Note 1) [Remarks] Reset released b2 State transition of clock mode register CLKM (address: 003716) setting value and clock (When XIN oscillation is used. The same applies when XCIN oscillation and external clock input are used.) XIN “O” HSOCO “S” • LSOCO xx00x010 b5,4 (Note 3) (Note 2) XIN, HSOCO, LSOCO, and respective oscillation and stop status in each mode are shown. The symbol ( •) indicates φSOURCE (oscillation) selected by the clock selection bits. “O” indicates oscillation and “S” indicates stopping. The values such as “xx00x010” indicate the values (binary) of the clock mode register in the mode. The arrow (bx) indicates a bit in the clock mode register, showing a transition by changing the bit values. Entering the mode should be performed according to the arrows. Wait mode and stop mode can be entered from all modes, and the original mode is returned after exiting. Notes 1: When stopping the low-speed on-chip oscillator is disabled by the low-speed on-chip oscillator control bit (bit 4 in FSROM2), “1” cannot be written to the bit 0 in CLKM. The low-speed on-chip oscillator does not stop even in stop mode. 2: After releasing reset, the low-speed on-chip oscillator is selected as φSOURCE and divided by 8 is selected as the CPU clock. 3: When the oscillation pins not used is set by the oscillation method selection bits (bits 1 and 0 in FSROM1), “10” cannot be written to bits 5 and 5 in CLKM. To use XIN oscillation as φSOURCE, switch after XIN oscillation is stabilized. Supply a stable clock when an external clock is used. 4: Do not change the values of the clock selection bits (bits 5 and 4) in CLKM and the individual clock oscillation control bits (bits 2 to 0) at the same time using a singe instruction. Always use different instructions to rewrite these values. 5: Wait until the oscillation used in the destination mode is stabilized before entering. Wait mode • Low-speed on-chip oscillator: Status before executing WIT instruction is kept • High-speed on-chip oscillator: Status before executing WIT instruction is kept • XIN oscillation: Status before executing the WIT instruction is kept Stop mode • Low-speed on-chip oscillator: Stopped (Note 1) • High-speed on-chip oscillator: Stopped • XIN oscillation: Stopped b5,4 (Note 3) |
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