| Electronic Components Datasheet Search |
|
7549 Datasheet(PDF) 73 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
7549 Datasheet(HTML) 73 Page - Renesas Technology Corp |
|
73 / 86 page ![]() Rev.2.02 Mar 31, 2009 Page 71 of 81 REJ03B0202-0202 7549 Group (7) Switching Characteristics Table 23 Switching characteristics (1) (VCC = 4.0 to 5.5 V, VSS = 0 V, Ta = −20 to 85 °C, unless otherwise noted) NOTE: 1. Pin XOUT is excluded. Table 24 Switching characteristics (2) (VCC = 2.4 to 5.5 V, VSS = 0 V, Ta = −20 to 85 °C, unless otherwise noted) NOTE: 1. Pin XOUT is excluded. Table 25 Switching characteristics (3) (VCC = 1.8 to 5.5 V, VSS = 0 V, Ta = −20 to 85 °C, unless otherwise noted) NOTE: 1. Pin XOUT is excluded. Fig 84. Switching characteristics measurement circuit diagram tWH(SCLK) tWL(SCLK) td(SCLK-TXD) tV(SCLK-TXD) tr(SCLK) tf(SCLK) tr(CMOS) tf(CMOS) Serial I/O clock output “H” pulse width Serial I/O clock output “L” pulse width Serial I/O output delay time Serial I/O output valid time Serial I/O clock output rising time Serial I/O clock output falling time CMOS output rising time (Note 1) CMOS output falling time (Note 1) Symbol Parameter Limits Unit Min. tC(SCLK)/2 −30 tC(SCLK)/2 −30 −30 Typ. 10 10 ns ns ns ns ns ns ns ns Max. 140 30 30 30 30 tWH(SCLK) tWL(SCLK) td(SCLK-TXD) tV(SCLK-TXD) tr(SCLK) tf(SCLK) tr(CMOS) tf(CMOS) Serial I/O clock output “H” pulse width Serial I/O clock output “L” pulse width Serial I/O output delay time Serial I/O output valid time Serial I/O clock output rising time Serial I/O clock output falling time CMOS output rising time (Note 1) CMOS output falling time (Note 1) Symbol Parameter Limits Unit Min. tC(SCLK)/2 −50 tC(SCLK)/2 −50 −30 Typ. 20 20 ns ns ns ns ns ns ns ns Max. 350 50 50 50 50 tWH(SCLK) tWL(SCLK) td(SCLK-TXD) tV(SCLK-TXD) tr(SCLK) tf(SCLK) tr(CMOS) tf(CMOS) Serial I/O clock output “H” pulse width Serial I/O clock output “L” pulse width Serial I/O output delay time Serial I/O output valid time Serial I/O clock output rising time Serial I/O clock output falling time CMOS output rising time (Note 1) CMOS output falling time (Note 1) Symbol Parameter Limits Unit Min. tC(SCLK)/2 −70 tC(SCLK)/2 −70 −30 Typ. 25 25 ns ns ns ns ns ns ns ns Max. 450 70 70 70 70 Measured output pin 100 pF CMOS output |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |