MAX9268GCMSLASHV+T datasheet(28/35 Pages) MAXIM

28 / 35 page

Gigabit Multimedia Serial Link Deserializer

with LVDS System Interface

28 _____________________________________________________________________________________

Programming the Device Addresses

Both the GMSL serializer and the MAX9268 have program-

mable device addresses. This allows multiple GMSL devic-

es along with I2C peripherals to coexist on the same control

channel. The serializer device address is stored in registers

0x00 of each device, while the deserializer device address

is stored in register 0x01 of each device. To change the

device address, first write to the device whose address

changes (register 0x00 of the GMSL serializer for serializer

device address change, or register 0x01 of the MAX9268

for deserializer device address change). Then write the

same address into the corresponding register on the other

device (register 0x00 of the MAX9268 for serializer device

address change, or register 0x01 of the GMSL serializer for

deserializer device address change).

3-Level Inputs for Default Device Address

ADD0 and ADD1 are 3-level inputs, which set the device

addresses stored in the MAX9268 (Table 2). Set the

desired device addresses by connecting ADD0/ADD1

through a pullup resistor to IOVDD, a pulldown resistor to

GND, or to high impedance. For digital control, use three-

state logic to drive the 3-level logic inputs.

ADD0/ADD1 set the device addresses in the MAX9268

only and not the GMSL serializer. Set the GMSL serial-

izer’s ADD0/ADD1 inputs to the same settings as the

MAX9268; alternatively, write to registers 0x00 and 0x01

of the GMSL serializer to reflect any changes made due

to the 3-level inputs.

Choosing I2C/UART Pullup Resistors

Both I2C/UART open-drain lines require pullup resistors to

provide a logic-high level. There are trade-offs between

power dissipation and speed, and a compromise made in

choosing pullup resistor values. Every device connected

to the bus introduces some capacitance even when the

device is not in operation. I2C specifies 300ns rise times to

go from low to high (30% to 70%) for fast mode, which is

defined for data rates up to 400kbps (see the I2C specifica-

tions in the AC Electrical Characteristics section for details).

To meet the fast-mode rise-time requirement, choose the

pullup resistors such that rise time tR = 0.85 x RPULLUP x

CBUS < 300ns. The waveforms are not recognized if the

transition time becomes too slow. The MAX9268 supports

I2C/UART rates up to 1Mbps.

AC-Coupling

AC-coupling isolates the receiver from DC voltages up

to the voltage rating of the capacitor. Four capacitors

(two at the serializer output and two at the deserializer

input) are needed for proper link operation and to provide

protection if either end of the cable is shorted to a high volt-

age. AC-coupling blocks low-frequency ground shifts and

low-frequency common-mode noise.

Selection of AC-Coupling Capacitors

Voltage droop and the digital sum variation (DSV) of

transmitted symbols cause signal transitions to start from

different voltage levels. Because the transition time is finite,

starting the signal transition from different voltage levels

causes timing jitter. The time constant for an AC-coupled

link needs to be chosen to reduce droop and jitter to an

acceptable level. The RC network for an AC-coupled link

consists of the CML receiver termination resistor (RTR),

the CML driver termination resistor (RTD), and the series

AC-coupling capacitors (C). The RC time constant for four

equal-value series capacitors is (C x (RTD + RTR))/4. RTD

and RTR are required to match the transmission line imped-

ance (usually 100I). This leaves the capacitor selection

to change the system time constant. Use at least 0.2FF

high-frequency surface-mount ceramic capacitors, with

sufficient voltage rating to withstand a short to battery, to

pass the lower speed reverse control-channel signal. Use

capacitors with a case size less than 3.2mm x 1.6mm to

have lower parasitic effects to the high-speed signal.

Power-Supply Circuits and Bypassing

The MAX9268 uses a 3.0V to 3.6V VAVDD and VDVDD. All

single-ended inputs and outputs on the MAX9268 derive

power from a 1.7V to 3.6V VIOVDD, which scales with

IOVDD. Proper voltage-supply bypassing is essential for

high-frequency circuit stability.

Cables and Connectors

Interconnect for CML typically has a differential impedance

of 100I. Use cables and connectors that have matched

differential impedance to minimize any impedance dis-

continuities. Twisted-pair and shielded twisted-pair cables

tend to generate less EMI due to magnetic-field canceling

effects. Balanced cables pick up noise as common mode

rejected by the CML receiver. Table 11 lists the suggested

cables and connectors used in the GMSL link.

MAX9268GCM/V+T Datasheet(PDF) 28 Page - Maxim Integrated Products

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