WM8750CLSEFLSLASHR datasheet(36/65 Pages) WOLFSON

36 / 65 page

WM8750L

Production Data

PD, Rev 4.4, August 2012

OUT3 OUTPUT

The OUT3 pin can drive a 16

 or 32 headphone or a line output or be used as a DC reference for a

headphone output (see Headphone Output section). It can be selected to either drive out an inverted

ROUT1 or inverted MONOOUT for e.g. an earpiece drive between OUT3 and LOUT1 or differential

output between OUT3 and MONOOUT. OUT3 can also drive an un-inverted ROUT1 signal, which

originates at the right mixer output before the output PGA.

OUT3SW selects the mode of operation required.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R24 (18h)

Additional

Control (2)

8:7

OUT3SW

[1:0]

OUT3 select

00 : VREF

01 : ROUT1 signal (volume controlled by

ROUT1VOL)

10 : MONOOUT

11 : right mixer output (no volume

control through ROUT1VOL)

Table 28 OUT3 Select

ENABLING THE OUTPUTS

Each analogue output of the WM8750L can be separately enabled or disabled. The analogue mixer

associated with each output is powered on or off along with the output pin. All outputs are disabled by

default. To save power, unused outputs should remain disabled.

Outputs can be enabled at any time, except when VREF is disabled (VR=0), as this may cause pop

noise (see “Power Management” and “Applications Information” sections)

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R26 (1Ah)

Power

Management

(2)

LOUT1

LOUT1 Enable

ROUT1

ROUT1 Enable

LOUT2

LOUT2 Enable

ROUT2

ROUT2 Enable

MONO

MONOOUT Enable

OUT3

OUT3 Enable

Note: All “Enable” bits are 1 = ON, 0 = OFF

Table 29 Analogue Output Control

Whenever an analogue output is disabled, it remains connected to VREF (pin 20) through a resistor.

This helps to prevent pop noise when the output is re-enabled. The resistance between VREF and

each output can be controlled using the VROI bit in register 27. The default is low (1.5k

), so that any

capacitors on the outputs can charge up quickly at start-up. If a high impedance is desired for

disabled outputs, VROI can then be set to 1, increasing the resistance to about 40k

.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R27 (1Bh)

Additional (1)

VROI

VREF to analogue output resistance

0: 1.5 k



1: 40 k



Table 30 Disabled Outputs to VREF Resistance

WM8750CLSEFL/R Datasheet(PDF) 36 Page - Wolfson Microelectronics plc

WM8750CLSEFL/R Datasheet(HTML) 36 Page - Wolfson Microelectronics plc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65

Datasheet Download

Link URL