WM8750CLSEFLSLASHR datasheet(51/65 Pages) WOLFSON

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Production Data

WM8750L

PD, Rev 4.4, August 2012

POWER MANAGEMENT

The WM8750L has two control registers that allow users to select which functions are active. For

minimum power consumption, unused functions should be disabled. To avoid any pop or click noise,

it is important to enable or disable functions in the correct order (see Applications Information).

VMIDSEL is the enable for the Vmid reference, which defaults to disabled and can be enabled as a

50k

 potential divider or, for low power maintenance of Vref when all other blocks are disabled, as a

500k

 potential divider.

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

R25 (19h)

Power

Management

(1)

8:7

VMIDSEL

Vmid divider enable and select

00 – Vmid disabled (for OFF mode)

01 – 50k

 divider enabled (for

playback/record)

10 – 500k

 divider enabled (for low-power

standby)

11 – 5k

 divider enabled (for fast start-up)

VREF

VREF (necessary for all other functions)

0 = Power down

1 = Power up

AINL

Analogue in PGA Left

0 = Power down

1 = Power up

AINR

Analogue in PGA Right

0 = Power down

1 = Power up

ADCL

ADC Left

0 = Power down

1 = Power up

ADCR

ADC Right

0 = Power down

1 = Power up

MICB

MICBIAS

0 = Power down

1 = Power up

R26 (1Ah)

Power

Management

(2)

DACL

DAC Left

0 = Power down

1 = Power up

DACR

DAC Right

0 = Power down

1 = Power up

LOUT1

LOUT1 Output Buffer*

0 = Power down

1 = Power up

ROUT1

ROUT1 Output Buffer*

0 = Power down

1 = Power up

LOUT2

LOUT2 Output Buffer*

0 = Power down

1 = Power up

ROUT2

ROUT2 Output Buffer*

0 = Power down

1 = Power up

MONO

MONOOUT Output Buffer and Mono Mixer

0 = Power down

1 = Power up

WM8750CLSEFL/R Datasheet(PDF) 51 Page - Wolfson Microelectronics plc

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