WM8750CLSEFLSLASHR datasheet(65/65 Pages) WOLFSON

Part #	WM8750CLSEFL/R

Description	Stereo CODEC for Portable Audio Applications

PDF	65 Pages

Scroll/Zoom	100%

Manufacturer	WOLFSON [Wolfson Microelectronics plc]

Direct Link	http://www.wolfsonmicro.com

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65 / 65 page

Production Data

WM8750L

PD, Rev 4.4, August 2012

REVISION HISTORY

DATE

RELEASE

DESCRIPTION OF CHANGES

PAGES

18/11/11

4.4

AIF Master mode timing update (tDDA).

Noted BCLK edge should coincide with MCLK falling edge for best ADC

performance.

RIZC, DEEMPH, MOUTVOL

Noted maximum recommended gain settings for ALC operation in differential

input mode.

Noted ADCDAT output is undefined logic state after power-up

Noted BCLK invert is not supported for ADC operation.

Noted DCVDD must be ≤ 1.5V for Right-Justified 16-bit or Right-Justified 20-bit

digital audio interface modes.

Replaced undefined term “DSP late” with “DSP Mode-B”.

Noted 1-sample delay in 88.2k, 88.235k and 96k ADC modes.

14, 40

21, 22, 31, 35

14/05/12

4.4

Order codes updated from WM8750LSEFL and WM8750LSEFL/R to

WM8750CLSEFL and WM8750CLSEFL/R to reflect change to copper wire

bonding.

14/05/12

4.4

Package diagram changed to DM101.A

WM8750CLSEFL/R Datasheet(PDF) 65 Page - Wolfson Microelectronics plc