Z8018010VSC datasheet(32/85 Pages) ZILOG

32 / 85 page

Z80180

Microprocessor Unit

PS014004-1106

Architecture

tINTS

INT Hold Time from Ø Fall

–

tNMIW

NMI Pulse Width

100

–

tBRS

BUSREQ Set-up Time to Ø Fall

–

tBRH

BUSREQ Hold Time from Ø Fall

tBAD1

Ø Rise to BUSACK Fall Delay

–

tBAD2

Ø Fall to BUSACK Rise Delay

–

tBZD

Ø Rise to Bus Floating Delay Time

–

tMEWH MREQ Pulse Width (High)

–

tMEWL MREQ Pulse Width (Low)

100

–

tRFD1

Ø Rise to RFSH Fall Delay

–

tRFD2

Ø Rise to RFSH Rise Delay

–

tHAD1

Ø Rise to HALT Fall Delay

–

tHAD2

Ø Rise to HALT Rise Delay

–

tDRQS /DREQi Set-up Time to Ø Rise

–

tDRQH /DREQi Hold Time from Ø Rise

–

tTED1

Ø Fall to TENDi Fall Delay

–

tTED2

Ø Fall to TENDi Rise Delay

–

tED1

Ø Rise to E Rise Delay

–

tED2

Ø Fall or Rise to E Fall Delay

–

PWEH

E Pulse Width (High)

–

PWEL

E Pulse Width (Low)

130

–

tEr

Enable Rise Time

–

tEf

Enable Fall Time

–

tTOD

Ø Fall to Timer Output Delay

–

200

tSTDI

CSIO Transmit Data Delay Time (Internal Clock

Operation)

–200

tSTDE

CSIO Transmit Data Delay Time (External Clock

Operation)

–

7.5tcy

+200

Table 8. Z80180-8 AC Characteristics (continued)

Symbol Item

Z80180-8

Unit

Min

Max

Z8018010VSC Datasheet(PDF) 32 Page - Zilog, Inc.

Z8018010VSC Datasheet(HTML) 32 Page - Zilog, Inc.

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85

Datasheet Download

Link URL