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Z8018010VSC Datasheet(PDF) 33 Page - Zilog, Inc. |
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Z8018010VSC Datasheet(HTML) 33 Page - Zilog, Inc. |
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33 / 85 page ![]() Z80180 Microprocessor Unit 27 PS014004-1106 Architecture 58 tSRSI CSIO Receive Data Set-up Time (Internal Clock Operation) 1–tcyc 59 tSRHI CSIO Receive Data Hold Time (Internal Clock Operation) 1–tcyc 60 tSRSE CSIO Receive Data Set-up Time (External Clock Operation) 1–tcyc 61 tSRHE CSIO Receive Data Hold Time (External Clock Operation) 1–tcyc 62 tRES RESET Set-up Time to Ø Fall 100 – ns 63 tREH RESET Hold Time from Ø Fall 70 – ns 64 tOSC Oscillator Stabilization Time – 20 ns 65 tEXr External Clock Rise Time (EXTAL) – 25 ns 66 tEXf External Clock Fall Time (EXTAL) – 25 ns 67 tRr RESET Rise Time – 50 ns 68 tRf RESET Fall Time – 50 ns 69 tIr Input Rise Time (except EXTAL, RESET)– 100 ns 70 tIf Input Fall Time (except EXTAL, RESET)– 100 ns Table 9. Z80180-10 AC Characteristics No Symbol Item Z80180-10 Unit Min Max 1tcyc Clock Cycle Time 100 2000 ns 2tCHW Clock H Pulse Width 40 – ns 3tCLW Clock L Pulse Width 40 – ns 4tcf Clock Fall Time – 10 ns 5tcr Clock Rise Time – 10 ns 6tAD ØRise to Address Valid Delay – 70 ns 7tAS Address Valid to MREQ Fall or IORQ Fall) 10 – ns Table 8. Z80180-8 AC Characteristics (continued) No Symbol Item Z80180-8 Unit Min Max |
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