30F4013 datasheet(217/228 Pages) MICROCHIP

217 / 228 page

 2010 Microchip Technology Inc.

DS70138G-page 217

dsPIC30F3014/4013

APPENDIX A:

REVISION HISTORY

Revision D (June 2006)

Previous versions of this data sheet contained

Advance or Preliminary Information. They

were

distributed with incomplete characterization data.

This revision reflects these changes:

• Revised I2C Slave Addresses

(see Table 14-1)

• Updated example for ADC Conversion Clock

selection (see Section 19.0 “12-bit Analog-to-

Digital Converter (ADC) Module”)

• Base instruction CP1 eliminated from instruction

set (seeTable 21-2)

• Revised electrical characteristics:

- Operating Current (IDD) Specifications

(see Table 23-5)

- Idle Current (IIDLE) Specifications

(see Table 23-6)

- Power-down Current (IPD) Specifications

(see Table 23-7)

- I/O pin Input Specifications

(see Table 23-8)

- Brown Out Reset (BOR) Specifications

(see Table 23-11)

- Watchdog Timer time-out limits

(see Table 23-20)

Revision E (January 2007)

This revision includes updates to the packaging

diagrams.

Revision F (April 2008)

This revision reflects these updates:

• Added FUSE Configuration Register (FICD)

details (see Section 20.8 “Device Configuration

Registers” and Table 20-8)

• Added Note 2 in Device Configuration Registers

table (Table 20-8)

• Removed erroneous statement regarding genera-

tion of CAN receive errors (see Section 17.4.5

“Receive Errors”)

• Updated ADC Conversion Clock and Sampling

Rate Calculation (see Example 19-1). Minimum

TAD is 334 nsec.

• Updated details related to the Input Change

Notification module:

- Updated last sentence in the first paragraph

of Section 7.3 “Input Change Notification

Module”

- Updated Table 7-2

- Removed Table 7-3, Table 7-4, and Table 7-5

• Electrical Specifications:

- Resolved TBD values for parameters DO10,

DO16, DO20, and DO26 (see Table 23-9)

- 10-bit High-Speed ADC tPDU timing parame-

ter (time to stabilize) has been updated from

20 µs typical to 20 µs maximum (see

Table 23-38)

- Parameter OS65 (Internal RC Accuracy) has

been expanded to reflect multiple Min and

Max values for different temperatures (see

Table 23-18)

- Parameter DC12 (RAM Data Retention Volt-

age) has been updated to include a Min value

(see Table 23-4)

- Parameter D134 (Erase/Write Cycle Time)

has been updated to include Min and Max

values and the Typ value has been removed

(see Table 23-12)

- Removed parameters OS62 (Internal FRC

Jitter) and OS64 (Internal FRC Drift) and

Note 2 from AC Characteristics (see

Table 23-17)

- Parameter OS63 (Internal FRC Accuracy)

has been expanded to reflect multiple Min

and Max values for different temperatures

(see Table 23-17)

- Removed parameters DC27a, DC27b,

DC47a, and DC47b (references to IDD,

20 MIPs @ 3.3V) in Table 23-5 and

Table 23-6

- Removed parameters CS77 and CS78

(references to TRACL and TFACL @ 3.3V) in

Table 23-29

- Updated Min and Max values and Conditions

for parameter SY11 and updated Min, Typ,

and Max values and Conditions for

parameter SY20 (see Table 23-20)

• Additional minor corrections throughout the

document

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