30F4013 datasheet(135/228 Pages) MICROCHIP

135 / 228 page

 2010 Microchip Technology Inc.

DS70138G-page 135

dsPIC30F3014/4013

Figure 19-2 depicts the recommended circuit for the

conversion rates above 200 ksps. The dsPIC30F3014

is shown as an example.

FIGURE 19-2:

ADC VOLTAGE REFERENCE SCHEMATIC

The configuration procedures below give the required

setup values for the conversion speeds above

100 ksps.

19.7.1

200 ksps CONFIGURATION

GUIDELINE

The following configuration items are required to

achieve a 200 ksps conversion rate.

• Comply with conditions provided in Table 19-2.

• Connect external VREF+ and VREF- pins following

the recommended circuit shown in Figure 19-2.

• Set SSRC<2.0> = 111 in the ADCON1 register to

enable the auto-convert option.

• Enable automatic sampling by setting the ASAM

control bit in the ADCON1 register.

• Write the SMPI<3.0> control bits in the ADCON2

between interrupts.

• Configure the ADC clock period to be:

by writing to the ADCS<5:0> control bits in the

ADCON3 register.

• Configure the sampling time to be 1 TAD by

writing: SAMC<4:0> = 00001.

The following figure shows the timing diagram of the

ADC running at 200 ksps. The TAD selection in conjunc-

tion with the guidelines described above allows a con-

version speed of 200 ksps. See Example 19-1 for code

example.

VDD

0.1

F

0.01

F

VDD

0.1

F

VDD

0.01

F

AVDD

F

AVDD

0.1

F

AVDD

0.01

F

See Note 1

Note 1: Ensure adequate bypass capacitors are provided on each VDD pin.

dsPIC30F3014

VSS

VDD

VSS

VDD

(14 + 1) x 200,000

= 334 ns

30F4013 Datasheet(PDF) 135 Page - Microchip Technology

30F4013 Datasheet(HTML) 135 Page - Microchip Technology

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL