IA82510

Data Sheet

Asynchronous Serial Controller

February 25, 2011

IA211001219-05

http://www.Innovasic.com

UNCONTROLLED WHEN PRINTED OR COPIED

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Errata No. 11

Problem:

In semi-automatic/uLAN mode, the RX FIFO is only opened when an address

character matches the ACR1 or ACR0 registers (like full auto mode).

Description:

In semi-auto mode, the RX FIFO should open on any address character.

Workaround:

None.

Errata No. 12

Problem:

Device fails to reset interrupt signal in auto acknowledge mode when character is read

from RX FIFO.

Description:

RD strobe is outside the CS enable, which is outside of the Intel datasheet, but

apparently still works in the Intel device. Such a bus cycle allows the read data out, but fails to

generate the necessary internal strobe to change pointers. The same problem is found on write

accesses.

Workaround:

Force bus interface to bracket RD strobe inside the CS enable.

Errata No. 13

Problem:

RX FIFO locks up unexpectedly just after configuration and before starting reception.

Description:

An RCM command is executed with data of xB8. This is an “enable RX”, “flush

RX machine”, “flush RX FIFO”, and “lock RX FIFO” command done in a single instruction. The

“flush RX machine” should unlock the RX FIFO, creating a conflict with the simultaneous “lock

RX FIFO” command. The original Intel device apparently ignores or gives the “lock RX FIFO”

command lower priority in this case. The IA82510 has this priority reversed. Apparently, the

application software in this case expected the “lock RX FIFO” command to fail.

Workaround:

Do not execute a “flush RX FIFO” and “lock RX FIFO” command simultaneously.

Break up into separate RCM commands.