IA82510

Data Sheet

Asynchronous Serial Controller

February 25, 2011

IA211001219-05

http://www.Innovasic.com

UNCONTROLLED WHEN PRINTED OR COPIED

Customer Support:

Page 18 of 25

1-888-824-4184

®

7.

Errata

The following errata are known problems with the IA82510. This is inclusive of all package types

and environment grades. A workaround to the identified problem has been provided where

possible. All errata listed in production Version 00 have been fixed in Version 01 of the device

unless otherwise noted. Version 02 is the result of a migration to a new fab process to ensure

long-term supply. It retains the same functionality and errata as the Version 01 device.

7.1

Summary

Table 8 presents a summary of errata.

Table 8. Summary of Errata

Errata

No.

Problem

Ver. 00

Ver. 01

Ver. 02

1

Scrambled data during boot code shuts down UART, however

device works for application code.

Exists

Fixed

Fixed

2

Device does not operate at 8 MHz in divide-by-one mode.

Exists

Fixed

Fixed

3

Setting CLCF to x30, which effectively generates the TX clock

from the incoming SCLK signal, kills all transmits.

Exists

Fixed

Fixed

4

Receiving streamed data has many framing errors and corrupt

data when connected to some modems.

Exists

Fixed

Fixed

5

Transmission of streamed data does not return interrupt.

Exists

Fixed

Fixed

6

Receiving streamed data has many framing errors at fast baud

rates (divisor=6) through bad modem lines.

Exists

Fixed

Fixed

7

Difficulty starting oscillator with crystal.

Exists

Fixed

Fixed

8

Intermittent and temperature sensitive crystal oscillator

operation when cycling power.

Exists

Fixed

Fixed

9

Auto-acknowledge of interrupts via writing of LSR does not

work.

Exists

Fixed

Fixed

10

ICM Status Clear command does not clear LSR/RST overrun

error.

Exists

Fixed

Fixed

11

In semi-automatic/uLAN mode, the RX FIFO is only opened

when an address character matches the ACR1 or ACR0

registers (like full auto mode).

Exists

Fixed

Fixed