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GDC21D301A Datasheet(PDF) 32 Page - Hynix Semiconductor |
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GDC21D301A Datasheet(HTML) 32 Page - Hynix Semiconductor |
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32 / 35 page ![]() 33 GDC21D301A 7.4.5 Host Processor Interface Requirements Host Write Mode DSP_ADDR[22:0] \DSP_PD DSP_DATA[15:0] \DSP_STRB DSP_READY DSP_RWB tSP tHs tHh t HRh Host Read Mode DSP_ADDR[22:0] \DSP_PD DSP_DATA[15:0] \DSP_STRB DSP_READY DSP_RWB tSP tHs tHh t HRh tHDOE tHDh PARAMETER PARAMETER MIN TYP MAX UNIT tHs Host setup time 0 - - ns tHh Host hold time 0 - - ns tHRh HREADY hold time - - 37 ns tHDOE Host data output enabled 0 - - ns tHDh Host data hold time 2 - - ns tSP Strobe precharge time 37 - - ns |
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