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TDC-GPX Datasheet(PDF) 18 Page - ams AG |
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TDC-GPX Datasheet(HTML) 18 Page - ams AG |
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18 / 54 page ![]() TDC-GPX acam-messelectronic gmbh - Am Hasenbiel 27 - D-76297 Stutensee-Blankenloch - Germany - www.acam.de 17 1.7 Register settings In depends on the operating mode whether bits are relevant or not. Especially the read data structure depends on the operating mode. 1.7.1 Write Registers Service bits are for acam testing and security purposes only, Please use the recommended values. These registers can also be read back. Register 0: Adr = 0 I G R M 0 ROsc ‘1’ = start ring oscillator x x x x 1 RiseEn0 ‘1’ enable rising edge sensitivity on DStart input x x x 2 FallEn0 ‘1’ enable falling edge sensitivity on DStart input x x x 3 RiseEn1 ‘1’ enable rising edge sensitivity on DStop1 input x x x 4 FallEn1 ‘1’ enable falling edge sensitivity on DStop1 input x x x 5 RiseEn2 ‘1’ enable rising edge sensitivity on DStop2 input x x x 6 FallEn2 ‘1’ enable falling edge sensitivity on DStop2 input x x x 7 – 9 HQSel Service bits, must be set to ‘001’ x x x x 10 – 18 TRiseEn ‘1’ enables rising edges for the TTL inputs Bit 10 = TStart, Bit 11 = TStop1 … Bit 18 = TStop8 x 19 – 27 TFallEn ‘1’ enables falling edges for the TTL inputs Bit 19 = TStart, Bit 20 = TStop1 … Bit 27 = TStop8 x Register 1: Adr = 1 I G R M 0 – 3 Adj0 Channel adjustment bits channel 0 (Start) x x x 4 – 7 Adj1 Channel adjustment bits channel 1 (R-Mode = 2, G-Mode = 0) x x x 8 – 11 Adj2 Channel adjustment bits channel 2 (R-Mode = 6, G-Mode = 5) x x x 12 – 15 Adj3 Channel adjustment bits channel 3 (R-Mode = 0, G-Mode = 0) x x x 16 – 19 Adj4 Channel adjustment bits channel 4 (R-Mode = 2, G-Mode = 5) x x x 20 – 23 Adj5 Channel adjustment bits channel 5 (R-Mode = 6, G-Mode = 0) x x x 24 – 27 Adj6 Channel adjustment bits channel 6 (R-Mode = 0, G-Mode = 5) x x x Adjustment bits recommendation: R-Mode: Adj1 = Adj4 = Adj7 = 2, Adj 2 = Adj 8 = 6, Adj5 = 6 G-Mode: Adj2 = Adj4 = Adj6 = Adj8 = 5. Register 2: Adr = 2 I G R M 0 G-Mode ‘1’ = switch on G-Mode x 1 I-Mode ‘1’ = switch on I-Mode x 2 R-Mode ‘1’ = switch on R-Mode x x 3 – 11 Disable ‘1’ = disable channel Bit 3 = channel 0 (Start) … Bit 11 = channel 8 x x x x 12 – 15 Adj7 Channel adjustment bits channel 7 (R-Mode = 2, G-Mode = 0) x x x 16 – 19 Adj8 Channel adjustment bits channel 8 (R-Mode = 6, G-Mode = 5) x x x 20 – 21 DelRise1 Service bits, set ‘0’ x x 22 – 23 DelFall1 Service bits, set ‘0’ x x 24 – 25 DelRise2 Service bits, set ‘0’ x x 26 – 27 DelFall2 Service bits, set ‘0’ x x Member of the ams Group |
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