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TDC-GPX Datasheet(PDF) 33 Page - ams AG

Part # TDC-GPX
Description  Ultra-high Performance 8 Channel Time- to-Digital Converter
PDF  54 Pages
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Manufacturer  AMSCO [ams AG]
Direct Link  http://www.ams.com
Logo AMSCO - ams AG

TDC-GPX Datasheet(HTML) 33 Page - ams AG

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TDC-GPX
acam-messelectronic gmbh - Am Hasenbiel 27 - D-76297 Stutensee-Blankenloch - Germany - www.acam.de
32
3.3 G-Mode Basics
In this mode the TDC-GPX offers:
2 Stop channels referring to 1 start channel
Each of 36 ps resolution
Rising and Falling edge for pulse width measure-
ment down to 1.5ns
Start-retrigger up to 5 MHz
4.7 ns pulse-pair resolution
0 to 65 µs measuring range
Minimum 32-fold multihit capability
Optional quiet mode
LVPECL inputs
t
ph
t
ss
t
ph
t
pl
t
rr
t
rr
t
va
Start
Stop
Alutrigger
EF
Figure 25. Measurement timings
In this mode the TDC-GPX has two independent STOP
input channels, each one capable of measuring the
rising and falling edge at the same time. Each channel
can store minimum 32 hits.
For improvement of the measurement accuracy, two
channels are internally combined, which leads to a
resolution of typical 40 ps. The paired channels are
called combined channels. Each one of these combined
channels measures rising or falling edges of one sam-
pling channel. With this method it is possible to meas-
ure pulses with a pulse-width down to the minimum
pulse-width allowed by the differential inputs, which is
typ. 1.5 ns. Two adjacent rising or falling edges on a
sampling channel may have a delay of down to 5.5 ns
(typ.).
Each STOP input has an 8 Bit stop counter, sensitive
to the falling edge. The number of hits for each input
can be read from register 11, StopCounter0 and
StopCounter1.
Internally the Start is shifted by an offset (in multiples
of LSB). This allows measuring hits that arrive earlier
than the start signal and to measure down to 0.
Input circuitry
In G-Mode the TDC-GPX has differential low-voltage
PECL input buffers. The power for the differential in-
puts has to be switched on separately by setting regis-
ter 6, PowerOnECL = ‘1’.
The detailed input structure is shown in Figure 24.
Each input separately can be set to be sensitive to
rising and/or falling edge. This is done in register0,
RiseEn0..2 and FallEn0..2. A zero in both bits for one
channel at the same time disables the channel.
All inputs can be disabled by hardware, the stop inputs
separately for rising and falling edges (pin ‘StopDis1’
disables inputs DStop1, rising edge etc.).
They also can be disabled by software setting the ‘Dis-
able’ in register 2. The ‘Disable’ bits have to be set in
pairs, e.g Disable3 and Disable4 to disable Dstop,
falling edge.
StopDisStart & StartDisStop
By default the Start and Stop inputs of the TDC-GPX
are open immediately after a reset.
The consequence for the Stop channels is that even
hits coming before a Start pulse will be measured. The
bit StopDisStart in register 5 disables the Stop chan-
nels until there is a Start pulse. A consequence is that
there is a minimum delay of 7 ns after the Start before
hits are accepted on the Stop channels.
With single-start only the first Start pulse is used for
the measurement. In case more than one Start pulse
is expected this might cause an overflow of the Hit
FIFO of the Start channel. This will produce garbage
data. There we recommend setting the StartDisStart
bit in register 5. A ‘1’ disables the Start channel after
the first Start pulse.
External Start Retrigger
A further option is to retrigger the Start externally.
This option is activated by setting StartRetrig = 1 (Reg
5). The maximum retrigger frequency is limited to
typically 5 MHz. Higher rates will disturb the chip.
Parameter
Time (Condition)
Description
tph
1.5 ns (min.)
Positive pulse width
tpl
1.5 ns (min.)
Negative pulse width
tss
0 ns min
*5.2 ns min
64 µs (max)
Start to Stop
*with StopDisStart = 1
trr, tff
5.5 ns typ.
6.9 ns max.
#
equal edge to edge
# @ 87 ps resolution
trf,fr
1.5 ns (typ.)
Falling edge to rising
edge and v.v.
tva
107 ns (max.)
ALU start to data valid
Member of the ams Group



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