MEC1322 datasheet(309/456 Pages) MICROCHIP

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 2014 - 2015 Microchip Technology Inc.

DS00001719D-page 309

MEC1322

27.5

Signal Description

27.6

Host Interface

The registers defined for the General Purpose Serial Peripheral Interface are accessible by the various hosts as indi-

cated in Section 27.12, "EC-Only Registers".

27.7

Power, Clocks and Reset

This section defines the Power, Clock, and Reset parameters of the block.

27.7.1

POWER DOMAINS

27.7.2

CLOCK INPUTS

27.7.3

RESETS

TABLE 27-1:

SIGNAL DESCRIPTION TABLE

Name

Direction

Description

SPDIN

Input

Serial Data In pin

SPDOUT

Input/Output

Serial Data Output pin. Switches to input when used in double-data-

rate mode

SPI_CLK

Output

SPI Clock output used to drive the SPCLK pin.

SPI_CS#

Output

SPI chip select

Note:

The SPI block signals that are shown in Table 27-1 are routed to the SPI pins as listed in Table 27-2.

TABLE 27-2:

SIGNAL TO PIN NAME LOOKUP TABLE

Block Name

Pin Name

SPDIN

SHD_MISO, PVT_MISO

SPDOUT

SHD_MOSI, PVT_MOSI

SPI_CLK

SHD_SCLK, PVT_SCLK

SPI_CS#

SHD_CS0#, PVT_CS0#

TABLE 27-3:

POWER SOURCES

Name

Description

VCC1

The logic and registers implemented in this block are powered by this

power well.

TABLE 27-4:

CLOCK INPUTS

Name

Description

48 MHz Ring Oscillator

This is a clock source for the SPI clock generator.

2MHz

This is a clock source for the SPI clock generator.

TABLE 27-5:

RESET SIGNALS

Name

Description

VCC1_RESET

This signal resets all the registers and logic in this block to their default

state.

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