MEC1322 datasheet(312/456 Pages) MICROCHIP

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MEC1322

DS00001719D-page 312

 2014 - 2015 Microchip Technology Inc.

The data may be configured to be transmitted MSB or LSB first. This is configured by the LSBF bit in the SPI Control

All received data can be sampled on a rising or falling SPI_CLK edge using the RCLKPH bit in the SPI Clock Control

There are three types of transactions that can be implemented for transmitting and receiving the SPI data. They are Full

Duplex, Half Duplex, and Dual Mode. These modes are define in Section 27.10.3, "Types of SPI Transactions".

27.10.2

DMA MODE

Transmit and receive operations can use a DMA channel. Note that only one DMA channel may be enabled at a

time. Setting up the DMA Controller involves specifying the device (Flash GP-SPI), direction (transmit/receive), and

the start and end addresses of the DMA buffers in the closely couple memory. Please refer to the DMA Controller chap-

ter for register programming information.

SPI transmit / DMA write: the GP-SPI block’s transmit empty (TxBE) status signal is used as a write request to the DMA

controller, which then fetches a byte from the DMA transmit buffer and writes it to the GP-SPI’s SPI TX Data Register

(SPITD). As content of the latter is transferred to the internal Tx shift register from which data is shifted out onto the SPI

bus bit by bit, the Tx Empty signal is again asserted, triggering the DMA fetch-and-write cycle. The process continues

until the end of the DMA buffer is reached - the DMA controller stops responding to an active Tx Empty until the buffer’s

address registers are reprogrammed.

SPI receive / DMA read: the AUTO_READ bit in the SPI Control Register must be set. The driver first writes (dummy

data) to the SPI TX Data Register (SPITD) to initiate the toggling of the SPI clock, enabling data to be shifted in. After

one byte is received, the Rx Full (RxBF) status signal, used as a read request to the DMA controller, is asserted. The

FIGURE 27-3:

MULTI-BYTE SPI TX/RX TRANSACTIONS (FULL DUPLEX MODE)

Note:

Common peripheral devices require a chip select signal to be asserted during a transaction. Chip selects

for SPI devices may be controlled by MEC1322 GPIO pins.

SPI BYTE Transactions

Rx_DATA Buffer Full (RxBF)

TX_DATA Buffer Empty (TxBE)

Write TX_Data

MCLK

SPDOUT_Direction

TX_DATA

BYTE

BYTE 1

BYTE 2

Read RX_Data

RX_DATA

BYTE 0

BYTE 1

BYT

Data Out Shift Register

Data In Shift Register

SPCLKO

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