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TMS320DM814x Datasheet(PDF) 102 Page - Texas Instruments |
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TMS320DM814x Datasheet(HTML) 102 Page - Texas Instruments |
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102 / 376 page ![]() TMS320DM8148, TMS320DM8147 SPRS647E – MARCH 2011 – REVISED DECEMBER 2013 www.ti.com Table 3-19. McASP2 Terminal Functions SIGNAL TYPE(1) OTHER(2) (3) MUXED DESCRIPTION NAME NO. McASP2 GP0 MCA[2]_ACLKX/ IPU U6 I/O PINCNTL39 McASP2 Transmit Bit Clock I/O GP0[10] DVDD DSIS: 0 AUD_CLKIN2/ AUD_CLKIN2, MCA[0]_AXR[9]/ MCA[0], MCA[5], MCA[2]_AHCLKX/ IPD EDMA, TIMER3, MCA[5]_AHCLKX/ H1 I/O McASP2 Transmit High-Frequency Master Clock I/O DVDD GP0 EDMA_EVT2/ PINCNTL16 TIM3_IO/ DSIS: PIN GP0[9] GP0 MCA[2]_AFSX/ IPU AA5 I/O PINCNTL40 McASP2 Transmit Frame Sync I/O GP0[11] DVDD DSIS: 0 MCA[2]_AXR[3]/ MCA[1], TIMER3, MCA[1]_AXR[7]/ IPD GP0 H2 I/O TIM3_IO/ DVDD PINCNTL44 GP0[15] DSIS: PIN MCA[2]_AXR[2]/ MCA[1], TIMER2, MCA[1]_AXR[6]/ IPD GP0 V5 I/O TIM2_IO/ DVDD PINCNTL43 GP0[14] DSIS: PIN McASP2 Transmit/Receive Data I/Os MCA[2]_AXR[1]/ SD0, UART5, GP0 SD0_DAT[7]/ IPU V6 I/O PINCNTL42 UART5_TXD/ DVDD DSIS: PIN GP0[13] MCA[2]_AXR[0]/ SD0, UART5, GP0 SD0_DAT[6]/ IPU N2 I/O PINCNTL41 UART5_RXD/ DVDD DSIS: PIN GP0[12] (1) I = Input, O = Output, Z = High impedance, S = Supply voltage, GND = Ground, A = Analog signal, MM = Multi Muxed, DSIS = De- selected Input State (2) IPD = Internal Pulldown Active, IPU = Internal Pullup Active, DIS = Internal Pull Disabled. This represents the default state of the Internal Pull during and after Reset. For more detailed information on pullup/pulldown resistors and situations where external pullup/pulldown resistors are required, see Section 4.5.1, Pullup/Pulldown Resistors and Section 7.3.17,Pin Behaviors at Reset. (3) Specifies the operating I/O supply voltage for each signal 102 Device Pins Copyright © 2011–2013, Texas Instruments Incorporated Submit Documentation Feedback Product Folder Links: TMS320DM8148 TMS320DM8147 |
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